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Add SF min/max under VSX, using the normal double operations

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From-SVN: r166273
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Michael Meissner 2010-11-03 20:35:34 +00:00 • committed by Michael Meissner
parent 0787e2e7a7
commit 92d54f6df5
5 changed files with 55 additions and 1 deletions
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7
gcc/ChangeLog
View file

@ -1,3 +1,10 @@
2010-11-03 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_emit_minmax): Add support to use
xsmindp/xsmaxdp on VSX for single precision min/max.
* config/rs6000/vsx.md (vsx_smaxsf3): Ditto.
(vsx_sminsf3): Ditto.
2010-11-03 Eric Botcazou <ebotcazou@adacore.com>
* combine.c (try_combine): Fix formatting issues, improve comments and

4
gcc/config/rs6000/rs6000.c
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@ -17205,7 +17205,9 @@ rs6000_emit_minmax (rtx dest, enum rtx_code code, rtx op0, rtx op1)
rtx target;
/* VSX/altivec have direct min/max insns. */
if ((code == SMAX || code == SMIN) && VECTOR_UNIT_ALTIVEC_OR_VSX_P (mode))
if ((code == SMAX || code == SMIN)
&& (VECTOR_UNIT_ALTIVEC_OR_VSX_P (mode)
|| (mode == SFmode && VECTOR_UNIT_VSX_P (DFmode))))
{
emit_insn (gen_rtx_SET (VOIDmode,
dest,

22
gcc/config/rs6000/vsx.md
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@ -437,6 +437,28 @@
[(set_attr "type" "<VStype_simple>")
(set_attr "fp_type" "<VSfptype_simple>")])
;; Special VSX version of smin/smax for single precision floating point. Since
;; both numbers are rounded to single precision, we can just use the DP version
;; of the instruction.
(define_insn "*vsx_smaxsf3"
[(set (match_operand:SF 0 "vsx_register_operand" "=f")
(smax:SF (match_operand:SF 1 "vsx_register_operand" "f")
(match_operand:SF 2 "vsx_register_operand" "f")))]
"VECTOR_UNIT_VSX_P (DFmode)"
"xsmaxdp %x0,%x1,%x2"
[(set_attr "type" "fp")
(set_attr "fp_type" "fp_addsub_d")])
(define_insn "*vsx_sminsf3"
[(set (match_operand:SF 0 "vsx_register_operand" "=f")
(smin:SF (match_operand:SF 1 "vsx_register_operand" "f")
(match_operand:SF 2 "vsx_register_operand" "f")))]
"VECTOR_UNIT_VSX_P (DFmode)"
"xsmindp %x0,%x1,%x2"
[(set_attr "type" "fp")
(set_attr "fp_type" "fp_addsub_d")])
(define_insn "*vsx_sqrt<mode>2"
[(set (match_operand:VSX_B 0 "vsx_register_operand" "=<VSr>,?wa")
(sqrt:VSX_B (match_operand:VSX_B 1 "vsx_register_operand" "<VSr>,wa")))]

5
gcc/testsuite/ChangeLog
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@ -1,3 +1,8 @@
2010-11-03 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/vsx-sfminmax.c: New test for using double
precision min/max for single precision on VSX.
2010-11-03 Jason Merrill <jason@redhat.com>
PR c++/46289

18
gcc/testsuite/gcc.target/powerpc/vsx-sfminmax.c Normal file
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@ -0,0 +1,18 @@
/* { dg-do compile { target { powerpc*-*-* } } } */
/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
/* { dg-require-effective-target powerpc_vsx_ok } */
/* { dg-options "-O2 -mcpu=power7 -ffast-math" } */
/* { dg-final { scan-assembler "xsmaxdp" } } */
/* { dg-final { scan-assembler "xsmindp" } } */
float
do_fmin (float a, float b)
{
return __builtin_fminf (a, b);
}
float
do_fmax (float a, float b)
{
return __builtin_fmaxf (a, b);
}