FreeChainXenon/gcc
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

RISC-V: Fix parsing of Zic* extensions

Browse source 
The extension parsing table entries for a range of Zic* extensions
does not match the mask definition in riscv.opt.
This results in broken TARGET_ZIC* macros, because the values of
riscv_zi_subext and riscv_zicmo_subext are set wrong.

This patch fixes this by moving Zic64b into riscv_zicmo_subext
and all other affected Zic* extensions to riscv_zi_subext.

gcc/ChangeLog:

	* common/config/riscv/riscv-common.cc: Move ziccamoa, ziccif,
	zicclsm, and ziccrse into riscv_zi_subext.
	* config/riscv/riscv.opt: Define MASK_ZIC64B for
	riscv_ziccmo_subext.

Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
(cherry picked from commit 285300eb928b171236e895f28c960ad02dcb0d67)
This commit is contained in:
Christoph Müllner 2024-04-29 00:46:06 +02:00 • committed by Kito Cheng
parent 68ef0c321a
commit 92003fad99
2 changed files with 6 additions and 6 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

8
gcc/common/config/riscv/riscv-common.cc
View file

@ -1554,15 +1554,15 @@ static const riscv_ext_flag_table_t riscv_ext_flag_table[] =
{"zihintntl", &gcc_options::x_riscv_zi_subext, MASK_ZIHINTNTL},
{"zihintpause", &gcc_options::x_riscv_zi_subext, MASK_ZIHINTPAUSE},
{"ziccamoa", &gcc_options::x_riscv_zi_subext, MASK_ZICCAMOA},
{"ziccif", &gcc_options::x_riscv_zi_subext, MASK_ZICCIF},
{"zicclsm", &gcc_options::x_riscv_zi_subext, MASK_ZICCLSM},
{"ziccrse", &gcc_options::x_riscv_zi_subext, MASK_ZICCRSE},
{"zicboz", &gcc_options::x_riscv_zicmo_subext, MASK_ZICBOZ},
{"zicbom", &gcc_options::x_riscv_zicmo_subext, MASK_ZICBOM},
{"zicbop", &gcc_options::x_riscv_zicmo_subext, MASK_ZICBOP},
{"zic64b", &gcc_options::x_riscv_zicmo_subext, MASK_ZIC64B},
{"ziccamoa", &gcc_options::x_riscv_zicmo_subext, MASK_ZICCAMOA},
{"ziccif", &gcc_options::x_riscv_zicmo_subext, MASK_ZICCIF},
{"zicclsm", &gcc_options::x_riscv_zicmo_subext, MASK_ZICCLSM},
{"ziccrse", &gcc_options::x_riscv_zicmo_subext, MASK_ZICCRSE},
{"zve32x", &gcc_options::x_target_flags, MASK_VECTOR},
{"zve32f", &gcc_options::x_target_flags, MASK_VECTOR},

4
gcc/config/riscv/riscv.opt
View file

@ -237,8 +237,6 @@ Mask(ZIHINTPAUSE) Var(riscv_zi_subext)
Mask(ZICOND) Var(riscv_zi_subext)
Mask(ZIC64B) Var(riscv_zi_subext)
Mask(ZICCAMOA) Var(riscv_zi_subext)
Mask(ZICCIF) Var(riscv_zi_subext)
@ -390,6 +388,8 @@ Mask(ZICBOM) Var(riscv_zicmo_subext)
Mask(ZICBOP) Var(riscv_zicmo_subext)
Mask(ZIC64B) Var(riscv_zicmo_subext)
TargetVariable
int riscv_zf_subext