[[ARM/AArch64][testsuite] 24/36] Add vmul_n tests.

2015-01-21  Christophe Lyon  <christophe.lyon@linaro.org>

	* gcc.target/aarch64/advsimd-intrinsics/vmul_n.c: New file.

From-SVN: r219941
This commit is contained in:
Christophe Lyon 2015-01-21 11:17:34 +00:00 committed by Christophe Lyon
parent ad9b853c30
commit 8afb62ac1c
2 changed files with 100 additions and 0 deletions

View file

@ -1,3 +1,7 @@
2015-01-21 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vmul_n.c: New file.
2015-01-21 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vmul_lane.c: New file.

View file

@ -0,0 +1,96 @@
#include <arm_neon.h>
#include "arm-neon-ref.h"
#include "compute-ref-data.h"
/* Expected results. */
VECT_VAR_DECL(expected,int,16,4) [] = { 0xfef0, 0xff01, 0xff12, 0xff23 };
VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffffde0, 0xfffffe02 };
VECT_VAR_DECL(expected,uint,16,4) [] = { 0xfcd0, 0xfd03, 0xfd36, 0xfd69 };
VECT_VAR_DECL(expected,uint,32,2) [] = { 0xfffffbc0, 0xfffffc04 };
VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0xc3b26666, 0xc3a74000 };
VECT_VAR_DECL(expected,int,16,8) [] = { 0xfab0, 0xfb05, 0xfb5a, 0xfbaf,
0xfc04, 0xfc59, 0xfcae, 0xfd03 };
VECT_VAR_DECL(expected,int,32,4) [] = { 0xfffff9a0, 0xfffffa06,
0xfffffa6c, 0xfffffad2 };
VECT_VAR_DECL(expected,uint,16,8) [] = { 0xf890, 0xf907, 0xf97e, 0xf9f5,
0xfa6c, 0xfae3, 0xfb5a, 0xfbd1 };
VECT_VAR_DECL(expected,uint,32,4) [] = { 0xfffff780, 0xfffff808,
0xfffff890, 0xfffff918 };
VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0xc4b1cccd, 0xc4a6b000,
0xc49b9333, 0xc4907667 };
#define INSN_NAME vmul_n
#define TEST_MSG "VMUL_N"
#define FNNAME1(NAME) exec_ ## NAME
#define FNNAME(NAME) FNNAME1(NAME)
void FNNAME (INSN_NAME) (void)
{
#define DECL_VMUL(VAR) \
DECL_VARIABLE(VAR, int, 16, 4); \
DECL_VARIABLE(VAR, int, 32, 2); \
DECL_VARIABLE(VAR, uint, 16, 4); \
DECL_VARIABLE(VAR, uint, 32, 2); \
DECL_VARIABLE(VAR, float, 32, 2); \
DECL_VARIABLE(VAR, int, 16, 8); \
DECL_VARIABLE(VAR, int, 32, 4); \
DECL_VARIABLE(VAR, uint, 16, 8); \
DECL_VARIABLE(VAR, uint, 32, 4); \
DECL_VARIABLE(VAR, float, 32, 4)
/* vector_res = vmul_n(vector,val), then store the result. */
#define TEST_VMUL_N(Q, T1, T2, W, N, L) \
VECT_VAR(vector_res, T1, W, N) = \
vmul##Q##_n_##T2##W(VECT_VAR(vector, T1, W, N), \
L); \
vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), \
VECT_VAR(vector_res, T1, W, N))
DECL_VMUL(vector);
DECL_VMUL(vector_res);
clean_results ();
/* Initialize vector from pre-initialized values. */
VLOAD(vector, buffer, , int, s, 16, 4);
VLOAD(vector, buffer, , int, s, 32, 2);
VLOAD(vector, buffer, , uint, u, 16, 4);
VLOAD(vector, buffer, , uint, u, 32, 2);
VLOAD(vector, buffer, , float, f, 32, 2);
VLOAD(vector, buffer, q, int, s, 16, 8);
VLOAD(vector, buffer, q, int, s, 32, 4);
VLOAD(vector, buffer, q, uint, u, 16, 8);
VLOAD(vector, buffer, q, uint, u, 32, 4);
VLOAD(vector, buffer, q, float, f, 32, 4);
/* Choose multiplier arbitrarily. */
TEST_VMUL_N(, int, s, 16, 4, 0x11);
TEST_VMUL_N(, int, s, 32, 2, 0x22);
TEST_VMUL_N(, uint, u, 16, 4, 0x33);
TEST_VMUL_N(, uint, u, 32, 2, 0x44);
TEST_VMUL_N(, float, f, 32, 2, 22.3f);
TEST_VMUL_N(q, int, s, 16, 8, 0x55);
TEST_VMUL_N(q, int, s, 32, 4, 0x66);
TEST_VMUL_N(q, uint, u, 16, 8, 0x77);
TEST_VMUL_N(q, uint, u, 32, 4, 0x88);
TEST_VMUL_N(q, float, f, 32, 4, 88.9f);
CHECK(TEST_MSG, int, 16, 4, PRIx64, expected, "");
CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, "");
CHECK(TEST_MSG, uint, 16, 4, PRIx64, expected, "");
CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, "");
CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected, "");
CHECK(TEST_MSG, int, 16, 8, PRIx64, expected, "");
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
CHECK(TEST_MSG, uint, 16, 8, PRIx64, expected, "");
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected, "");
}
int main (void)
{
FNNAME (INSN_NAME) ();
return 0;
}