re PR middle-end/41930 (cc1 SEGV compiling maxval_r16.c)
PR middle-end/41930 * simplify-rtx.c (simplify_replace_fn_rtx) <case 'e'>: Skip processing if XEXP (x, i) is NULL. From-SVN: r154116
This commit is contained in:
parent
fcc993f6f5
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2 changed files with 57 additions and 50 deletions
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@ -1,3 +1,9 @@
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2009-11-12 Uros Bizjak <ubizjak@gmail.com>
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PR middle-end/41930
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* simplify-rtx.c (simplify_replace_fn_rtx) <case 'e'>: Skip
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processing if XEXP (x, i) is NULL.
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2009-11-12 Jan Hubicka <jh@suse.cz>
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* ipa.c (function_and_variable_visibility): Verify that WEAK || COMMON
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@ -43,17 +49,15 @@
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2009-11-11 Kai Tietz <kai.tietz@onevision.com>
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* config/i386/cygming.h (HANDLE_PRAGMA_PUSH_POP_MACRO):
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Removed.
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* config/i386/cygming.h (HANDLE_PRAGMA_PUSH_POP_MACRO): Removed.
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* c-pragma.c (def_pragma_macro_value): Likewise.
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(def_pragma_macro): Likewise.
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(pushed_macro_table): Likewise.
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(HANDLE_PRAGMA_PUSH_POP_MACRO): Remove guarded
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code.
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* doc/tm.texi (HANDLE_PRAGMA_PUSH_POP_MACRO):
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Removed.
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(HANDLE_PRAGMA_PUSH_POP_MACRO): Remove guarded code.
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* doc/tm.texi (HANDLE_PRAGMA_PUSH_POP_MACRO): Removed.
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2009-11-11 Basile Starynkevitch <basile@starynkevitch.net>
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* doc/plugins.texi (Registering custom attributes): section
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renamed as (Registering custom attributes or pragmas).
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Mentions custom attributes & pragmas, and c_register_pragma, with
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@ -65,21 +69,21 @@
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2009-11-11 Jon Beniston <jon@beniston.com>
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* config.gcc: Add lm32 elf and uclinux targets.
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* config/lm32: New directory.
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* config/lm32/lm32.c: New file.
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* config/lm32/lm32.h: New file.
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* config/lm32/lm32.md: New file.
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* config/lm32/lm32.opt: New file.
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* config/lm32/lm32-protos.h: New file.
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* config/lm32/constraints.md: New file.
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* config/lm32/predicates.md: New file.
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* config/lm32/sfp-machine.h: New file.
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* config/lm32/t-fprules-softfp: New file.
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* config/lm32/uclinux-elf.h: New file.
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* doc/invoke.texi: Document lm32 options.
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* doc/contrib.texi: Document lm32 porter.
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* doc/install.texi: Document lm32 targets.
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* config.gcc: Add lm32 elf and uclinux targets.
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* config/lm32: New directory.
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* config/lm32/lm32.c: New file.
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* config/lm32/lm32.h: New file.
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* config/lm32/lm32.md: New file.
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* config/lm32/lm32.opt: New file.
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* config/lm32/lm32-protos.h: New file.
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* config/lm32/constraints.md: New file.
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* config/lm32/predicates.md: New file.
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* config/lm32/sfp-machine.h: New file.
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* config/lm32/t-fprules-softfp: New file.
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* config/lm32/uclinux-elf.h: New file.
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* doc/invoke.texi: Document lm32 options.
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* doc/contrib.texi: Document lm32 porter.
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* doc/install.texi: Document lm32 targets.
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2009-11-11 Martin Jambor <mjambor@suse.cz>
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@ -173,8 +177,8 @@
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* gdbinit.in (pgq): New function for printing gimple sequence.
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2009-11-09 Paul Brook <paul@codesourcery.com>
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Daniel Jacobowitz <dan@codesourcery.com>
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Sandra Loosemore <sandra@codesourcery.com>
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Daniel Jacobowitz <dan@codesourcery.com>
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Sandra Loosemore <sandra@codesourcery.com>
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* doc/extend.texi (Half-Precision): Update wording to reflect
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that there are now multiple -mfpu options that enable fp16
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@ -188,9 +192,9 @@
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when undesirable.
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(aapcs_vfp_is_return_candidate, aapcs_vfp_is_call_candidate,
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aapcs_vfp_allocate_return_reg): Use use_vfp_abi.
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(arm_rtx_costs_1, arm_size_rtx_costs, arm_fastmul_rtx_costs,
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arm_9e_rtx_costs): Only expect double-precision operations if the FPU
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provides them.
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(arm_rtx_costs_1, arm_size_rtx_costs, arm_fastmul_rtx_costs,
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arm_9e_rtx_costs): Only expect double-precision operations if the FPU
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provides them.
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(coproc_secondary_reload_class): Reload HFmode via GENERAL_REGS if no
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NEON.
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(arm_print_operand): Handle 'p' modifier.
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does not provide them.
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(arm_movdi_vfp, thumb2_movdi_vfp): Use fcpys to move
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double-precision values on a single-precision FPU.
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(movdf_vfp, thumb2_movdf_vfp): Likewise. Use "Dy" for
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double-precision constants.
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(movdf_vfp, thumb2_movdf_vfp): Likewise. Use "Dy" for
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double-precision constants.
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(movhf_vfp_neon): New pattern (was movhf_vfp).
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(movhf_vfp): Remove NEON instructions.
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* config/arm/constraints.md: Add new "Dy" constraint for
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@ -403,7 +407,7 @@
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2009-11-04 Kenneth Zadeck <zadeck@naturalbridge.com>
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* df-scan.c (df-uses-record): Add case zero_extract of mem.
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2009-11-04 Eric Botcazou <ebotcazou@adacore.com>
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PR target/10127
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@ -423,11 +427,11 @@
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* config/i386/cpuid.h (bit_LWP): Define LWP bit.
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* config/i386/x86intrin.h: Add LWP check and lwpintrin.h.
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* config/i386/i386-c.c (ix86_target_macros_internal): Check
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ISA_FLAG for LWP.
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ISA_FLAG for LWP.
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* config/i386/i386.h (TARGET_LWP): New macro for LWP.
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* config/i386/i386.opt (-mlwp): New switch for LWP support.
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* config/i386/i386.c (OPTION_MASK_ISA_LWP_SET): New.
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(OPTION_MASK_ISA_LWP_UNSET): New.
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(OPTION_MASK_ISA_LWP_UNSET): New.
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(ix86_handle_option): Handle -mlwp.
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(isa_opts): Handle -mlwp.
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(enum pta_flags): Add PTA_LWP.
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@ -448,7 +452,7 @@
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(builtin_description): Ditto.
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(ix86_init_mmx_sse_builtins): Ditto.
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(ix86_expand_special_args_builtin): Ditto.
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* config/i386/i386.md (UNSPEC_LLWP_INTRINSIC): Add new UNSPEC for
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* config/i386/i386.md (UNSPEC_LLWP_INTRINSIC): Add new UNSPEC for
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LWP support.
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(UNSPEC_SLWP_INTRINSIC): Ditto.
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(UNSPECV_LWPVAL_INTRINSIC): Ditto.
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@ -465,22 +469,22 @@
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(lwp_lwpinshi3): Ditto.
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(lwp_lwpinssi3): Ditto.
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(lwp_lwpinsdi3): Ditto.
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2009-11-04 Andrew Pinski <andrew_pinski@playstation.sony.com>
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Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
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Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
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PR rtl-opt/41833
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* simplify-rtx.c (simplify_binary_operation_1): Simplify vec_select of
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a vec_duplicate.
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2009-11-04 Richard Guenther <rguenther@suse.de>
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Rafael Avila de Espindola <espindola@google.com>
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Rafael Avila de Espindola <espindola@google.com>
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* gcc.c (process_command): Handle arguments name@offset.
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2009-11-04 Harsha Jagasia <harsha.jagasia@amd.com>
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Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
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* config.gcc (i[34567]86-*-*): Include xopintrin.h.
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(x86_64-*-*): Ditto.
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* config/i386/xopintrin.h: New file, provide common x86 compiler
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@ -488,7 +492,7 @@
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* config/i386/cpuid.h (bit_XOP): Define XOP bit.
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* config/i386/x86intrin.h: Add XOP check and xopintrin.h.
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* config/i386/i386-c.c(ix86_target_macros_internal): Check
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ISA_FLAG for XOP.
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ISA_FLAG for XOP.
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* config/i386/i386.h(TARGET_XOP): New macro for XOP.
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* config/i386/i386.opt (-mxop): New switch for XOP support.
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* config/i386/i386.md (UNSPEC_XOP_UNSIGNED_CMP)
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@ -498,7 +502,7 @@
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(PPERM_*): New constants for vpperm instruction.
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(xop_pcmov_<mode>): Add XOP conditional mov instructions.
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* config/i386/i386.c (OPTION_MASK_ISA_XOP_SET): New.
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(OPTION_MASK_ISA_XOP_UNSET): New.
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(OPTION_MASK_ISA_XOP_UNSET): New.
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(OPTION_MASK_ISA_XOP_UNSET): Change definition to depend on XOP.
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(ix86_handle_option): Handle -mxop.
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(isa_opts): Handle -mxop.
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@ -677,7 +681,7 @@
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(xop_pmadcsswd): Ditto.
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(xop_pmadcswd): Ditto.
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(xop_pcmov_<mode>): Ditto.
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(xop_pcmov_<mode>)256: Ditto.
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(xop_pcmov_<mode>256): Ditto.
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(xop_phaddbw): Ditto.
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(xop_phaddbd): Ditto.
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(xop_phaddbq): Ditto.
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(ashrv2di3): Ditto.
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(xop_frcz<mode>2): Ditto.
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(xop_vmfrcz<mode>2): Ditto.
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(xop_frcz<mode>2256): Ditto.
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(xop_frcz<mode>2256): Ditto.
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(xop_maskcmp<mode>3): Ditto.
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(xop_maskcmp_uns<mode>3): Ditto.
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(xop_maskcmp_uns2<mode>3): Ditto.
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* doc/invoke.texi (-mxop): Add documentation.
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* doc/extend.texi (x86 intrinsics): Add XOP intrinsics.
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2009-11-03 Mark Mitchell <mark@codesourcery.com>
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PR driver/11810
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* config/frv/frv.c (frv_function_value, frv_libcall_value,
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frv_function_value_regno_p): New functions.
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(TARGET_FUNCTION_VALUE, TARGET_LIBCALL_VALUE): Declare.
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* config/frv/frv.h: (FUNCTION_VALUE, LIBCALL_VALUE): Remove.
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* config/frv/frv.h (FUNCTION_VALUE, LIBCALL_VALUE): Remove.
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(FUNCTION_VALUE_REGNO_P): Redefine, use frv_function_value_regno_p.
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* config/frv/frv-protos.h (frv_function_value_regno_p): Declare.
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new 'outgoing' argument.
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(mn10300_libcall_value, mn10300_function_value_regno_p): New functions.
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(TARGET_FUNCTION_VALUE, TARGET_LIBCALL_VALUE): Declare.
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* config/mn10300/mn10300.h: (FUNCTION_VALUE, FUNCTION_OUTGOING_VALUE,
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* config/mn10300/mn10300.h (FUNCTION_VALUE, FUNCTION_OUTGOING_VALUE,
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LIBCALL_VALUE): Remove.
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(FUNCTION_VALUE_REGNO_P): Redefine, use mn10300_function_value_regno_p.
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* config/mn10300/mn10300-protos.h (mn10300_function_value): Remove.
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@ -1014,7 +1018,7 @@
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2009-10-31 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
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* config/arm/cortex-a9.md: New - integer pipeline description.
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* config/arm/cortex-a9.md: New - integer pipeline description.
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2009-10-31 Eric Botcazou <ebotcazou@adacore.com>
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@ -489,12 +489,15 @@ simplify_replace_fn_rtx (rtx x, const_rtx old_rtx,
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break;
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case 'e':
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op = simplify_replace_fn_rtx (XEXP (x, i), old_rtx, fn, data);
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if (op != XEXP (x, i))
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if (XEXP (x, i))
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{
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if (x == newx)
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newx = shallow_copy_rtx (x);
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XEXP (newx, i) = op;
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op = simplify_replace_fn_rtx (XEXP (x, i), old_rtx, fn, data);
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if (op != XEXP (x, i))
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{
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if (x == newx)
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newx = shallow_copy_rtx (x);
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XEXP (newx, i) = op;
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}
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}
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break;
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}
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