Simplify movmem code by always doing overlapping copies when larger than 8 bytes on AArch64.
This changes the movmem code in AArch64 that does copy for data between 4 and 7 bytes to use the smallest possible mode capable of copying the remaining bytes in one go and then overlapping the reads if needed. This means that if we're copying 5 bytes we would issue an SImode and QImode load instead of two SImode loads. This does smaller memory accesses but also gives the mid-end a chance to realise that it can CSE the loads in certain circumstances. e.g. when you have something like return foo; where foo is a struct. This would be transformed by the mid-end into SSA form as D.XXXX = foo; return D.XXXX; This movmem routine will handle the first copy, but it's usually not needed, the mid-end would do SImode and QImode stores into X0 for the 5 bytes example but without the first copies being in the same mode, it doesn't know it doesn't need the stores at all. From-SVN: r262434
This commit is contained in:
Tamar Christina
Tamar Christina
parent
bdfc619ed8
commit
89c52e5e2c
4 changed files with 116 additions and 81 deletions
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@ -1,3 +1,7 @@
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2018-07-05 Tamar Christina <tamar.christina@arm.com>
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* config/aarch64/aarch64.c (aarch64_expand_movmem): Fix mode size.
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2018-07-05 Jakub Jelinek <jakub@redhat.com>
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Revert
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@ -16137,26 +16137,29 @@ aarch64_copy_one_block_and_progress_pointers (rtx *src, rtx *dst,
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bool
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aarch64_expand_movmem (rtx *operands)
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{
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unsigned int n;
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int n, mode_bits;
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rtx dst = operands[0];
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rtx src = operands[1];
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rtx base;
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machine_mode cur_mode = BLKmode, next_mode;
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bool speed_p = !optimize_function_for_size_p (cfun);
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/* When optimizing for size, give a better estimate of the length of a
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memcpy call, but use the default otherwise. */
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unsigned int max_instructions = (speed_p ? 15 : AARCH64_CALL_RATIO) / 2;
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memcpy call, but use the default otherwise. Moves larger than 8 bytes
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will always require an even number of instructions to do now. And each
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operation requires both a load+store, so devide the max number by 2. */
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int max_num_moves = (speed_p ? 16 : AARCH64_CALL_RATIO) / 2;
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/* We can't do anything smart if the amount to copy is not constant. */
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if (!CONST_INT_P (operands[2]))
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return false;
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n = UINTVAL (operands[2]);
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n = INTVAL (operands[2]);
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/* Try to keep the number of instructions low. For cases below 16 bytes we
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need to make at most two moves. For cases above 16 bytes it will be one
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move for each 16 byte chunk, then at most two additional moves. */
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if (((n / 16) + (n % 16 ? 2 : 0)) > max_instructions)
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/* Try to keep the number of instructions low. For all cases we will do at
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most two moves for the residual amount, since we'll always overlap the
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remainder. */
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if (((n / 16) + (n % 16 ? 2 : 0)) > max_num_moves)
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return false;
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base = copy_to_mode_reg (Pmode, XEXP (dst, 0));
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@ -16165,81 +16168,36 @@ aarch64_expand_movmem (rtx *operands)
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base = copy_to_mode_reg (Pmode, XEXP (src, 0));
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src = adjust_automodify_address (src, VOIDmode, base, 0);
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/* Simple cases. Copy 0-3 bytes, as (if applicable) a 2-byte, then a
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1-byte chunk. */
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if (n < 4)
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/* Convert n to bits to make the rest of the code simpler. */
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n = n * BITS_PER_UNIT;
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while (n > 0)
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{
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if (n >= 2)
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/* Find the largest mode in which to do the copy in without over reading
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or writing. */
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opt_scalar_int_mode mode_iter;
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FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
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if (GET_MODE_BITSIZE (mode_iter.require ()) <= n)
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cur_mode = mode_iter.require ();
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gcc_assert (cur_mode != BLKmode);
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mode_bits = GET_MODE_BITSIZE (cur_mode).to_constant ();
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aarch64_copy_one_block_and_progress_pointers (&src, &dst, cur_mode);
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n -= mode_bits;
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/* Do certain trailing copies as overlapping if it's going to be
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cheaper. i.e. less instructions to do so. For instance doing a 15
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byte copy it's more efficient to do two overlapping 8 byte copies than
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8 + 6 + 1. */
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next_mode = smallest_mode_for_size (n, MODE_INT);
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int n_bits = GET_MODE_BITSIZE (next_mode).to_constant ();
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if (n > 0 && n_bits > n && n_bits <= 8 * BITS_PER_UNIT)
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{
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aarch64_copy_one_block_and_progress_pointers (&src, &dst, HImode);
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n -= 2;
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}
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if (n == 1)
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aarch64_copy_one_block_and_progress_pointers (&src, &dst, QImode);
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return true;
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}
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/* Copy 4-8 bytes. First a 4-byte chunk, then (if applicable) a second
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4-byte chunk, partially overlapping with the previously copied chunk. */
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if (n < 8)
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{
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aarch64_copy_one_block_and_progress_pointers (&src, &dst, SImode);
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n -= 4;
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if (n > 0)
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{
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int move = n - 4;
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src = aarch64_move_pointer (src, move);
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dst = aarch64_move_pointer (dst, move);
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aarch64_copy_one_block_and_progress_pointers (&src, &dst, SImode);
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}
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return true;
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}
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/* Copy more than 8 bytes. Copy chunks of 16 bytes until we run out of
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them, then (if applicable) an 8-byte chunk. */
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while (n >= 8)
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{
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if (n / 16)
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{
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aarch64_copy_one_block_and_progress_pointers (&src, &dst, TImode);
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n -= 16;
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}
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else
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{
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aarch64_copy_one_block_and_progress_pointers (&src, &dst, DImode);
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n -= 8;
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}
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}
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/* Finish the final bytes of the copy. We can always do this in one
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instruction. We either copy the exact amount we need, or partially
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overlap with the previous chunk we copied and copy 8-bytes. */
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if (n == 0)
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return true;
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else if (n == 1)
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aarch64_copy_one_block_and_progress_pointers (&src, &dst, QImode);
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else if (n == 2)
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aarch64_copy_one_block_and_progress_pointers (&src, &dst, HImode);
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else if (n == 4)
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aarch64_copy_one_block_and_progress_pointers (&src, &dst, SImode);
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else
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{
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if (n == 3)
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{
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src = aarch64_move_pointer (src, -1);
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dst = aarch64_move_pointer (dst, -1);
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aarch64_copy_one_block_and_progress_pointers (&src, &dst, SImode);
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}
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else
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{
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int move = n - 8;
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src = aarch64_move_pointer (src, move);
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dst = aarch64_move_pointer (dst, move);
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aarch64_copy_one_block_and_progress_pointers (&src, &dst, DImode);
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src = aarch64_move_pointer (src, (n - n_bits) / BITS_PER_UNIT);
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dst = aarch64_move_pointer (dst, (n - n_bits) / BITS_PER_UNIT);
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n = n_bits;
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}
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}
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@ -1,3 +1,7 @@
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2018-07-05 Tamar Christina <tamar.christina@arm.com>
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* gcc.target/aarch64/struct_cpy.c: New.
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2018-07-05 Christophe Lyon <christophe.lyon@linaro.org>
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* c-c++-common/unroll-1.c: Remove 'note:' in matching string.
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69
gcc/testsuite/gcc.target/aarch64/struct_cpy.c
Normal file
69
gcc/testsuite/gcc.target/aarch64/struct_cpy.c
Normal file
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@ -0,0 +1,69 @@
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/* { dg-do compile } */
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struct struct1 { char a;};
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struct struct2 { char a, b;};
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struct struct3 { char a, b, c; };
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struct struct4 { char a, b, c, d; };
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struct struct5 { char a, b, c, d, e; };
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struct struct6 { char a, b, c, d, e, f; };
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struct struct7 { char a, b, c, d, e, f, g; };
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struct struct8 { char a, b, c, d, e, f, g, h; };
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struct struct9 { char a, b, c, d, e, f, g, h, i; };
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struct struct10 { char a, b, c, d, e, f, g, h, i, j; };
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struct struct11 { char a, b, c, d, e, f, g, h, i, j, k; };
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struct struct12 { char a, b, c, d, e, f, g, h, i, j, k, l; };
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struct struct13 { char a, b, c, d, e, f, g, h, i, j, k, l, m; };
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struct struct14 { char a, b, c, d, e, f, g, h, i, j, k, l, m, n; };
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struct struct15 { char a, b, c, d, e, f, g, h, i, j, k, l, m, n, o; };
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struct struct16 { char a, b, c, d, e, f, g, h, i, j, k, l, m, n, o, p; };
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struct struct1 foo1 = {'1'};
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struct struct2 foo2 = { 'a', 'b'};
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struct struct3 foo3 = { 'A', 'B', 'C'};
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struct struct4 foo4 = {'1', '2', '3', '4'};
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struct struct5 foo5 = {'a', 'b', 'c', 'd', 'e'};
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struct struct6 foo6 = {'A', 'B', 'C', 'D', 'E', 'F'};
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struct struct7 foo7 = {'1', '2', '3', '4', '5', '6', '7'};
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struct struct8 foo8 = {'1', '2', '3', '4', '5', '6', '7', '8'};
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struct struct9 foo9 = {'a', 'b', 'c', 'd', 'e', 'f', 'g', 'h', 'i'};
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struct struct10 foo10 = {
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'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', 'I', 'J'};
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struct struct11 foo11 = {
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'1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B'};
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struct struct12 foo12 = {
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'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', 'I', 'J', 'K', 'L'};
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struct struct13 foo13 = {
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'a','b','c','d','e','f','g','h','i','j','k','l','m'};
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struct struct14 foo14 = {
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'a','b','c','d','e','f','g','h','i','j','k','l','m','n'};
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struct struct15 foo15 = {
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'a','b','c','d','e','f','g','h','i','j','k','l','m','n','o'};
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struct struct16 foo16 = {
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'a','b','c','d','e','f','g','h','i','j','k','l','m','n','o','p'};
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#define FUN(x) void fun##x ()\
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{ \
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volatile struct struct##x var##x = foo##x; \
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}
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FUN(1);
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FUN(2);
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FUN(3);
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FUN(4);
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FUN(5);
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FUN(6);
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FUN(7);
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FUN(8);
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FUN(9);
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FUN(10);
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FUN(11);
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FUN(12);
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FUN(13);
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FUN(14);
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FUN(15);
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FUN(16);
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/* { dg-final { scan-assembler-times {ldr\s} 18 } } */
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/* { dg-final { scan-assembler-times {ldrb} 4 } } */
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/* { dg-final { scan-assembler-times {ldrh} 4 } } */
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/* { dg-final { scan-assembler-times {ldp} 1 } } */
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