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RISC-V: Support TU for integer ternary OP[PR110964]

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PR target/110964

gcc/ChangeLog:
	PR target/110964
	* config/riscv/riscv-v.cc (expand_cond_len_ternop): Add integer ternary.

gcc/testsuite/ChangeLog:
	PR target/110964
	* gcc.target/riscv/rvv/autovec/pr110964.c: New test.
This commit is contained in:
Juzhe-Zhong 2023-08-10 17:21:46 +08:00 • committed by Pan Li
parent 9b8ebdb60c
commit 887f13916b
2 changed files with 14 additions and 2 deletions
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3
gcc/config/riscv/riscv-v.cc
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@ -3604,8 +3604,7 @@ expand_cond_len_ternop (unsigned icode, rtx *ops)
if (FLOAT_MODE_P (mode))
emit_nonvlmax_fp_ternary_tu_insn (icode, RVV_TERNOP_TU, ops, len);
else
/* FIXME: Enable this case when we support it in the middle-end. */
gcc_unreachable ();
emit_nonvlmax_tu_insn (icode, RVV_TERNOP_TU, ops, len);
}
else
{

13
gcc/testsuite/gcc.target/riscv/rvv/autovec/pr110964.c Normal file
View file

@ -0,0 +1,13 @@
/* { dg-do compile } */
/* { dg-options "-march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=scalable -Ofast" } */
int *a;
long b, c;
int d ()
{
const int e;
for (; a < e; a++) /* { dg-warning "comparison between pointer and integer" } */
c += *a * b;
}