i386: Eliminate redundant compare between set{z,nz} and j{z,nz}
Eliminate redundant compare between set{z,nz} and j{z,nz}: setz %al; test %al,%al; jz <...> -> setz %al; jnz <...> and setnz %al, test %al,%al; jz <...> -> setnz %al; jz <...>. We can use the original Zero-flag value instead of setting the temporary register and testing it for zero. gcc/ChangeLog: * config/i386/i386.md (redundant compare peephole2): New peephole2 pattern.
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@ -18118,6 +18118,35 @@
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FAIL;
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})
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;; Eliminate redundant compare between set{z,nz} and j{z,nz}:
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;; setz %al; test %al,%al; jz <...> -> setz %al; jnz <...> and
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;; setnz %al, test %al,%al; jz <...> -> setnz %al; jz <...>.
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(define_peephole2
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[(set (match_operand:QI 0 "nonimmediate_operand")
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(match_operator:QI 1 "bt_comparison_operator"
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[(reg:CCZ FLAGS_REG) (const_int 0)]))
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(set (reg:CCZ FLAGS_REG)
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(compare:CCZ (match_dup 0) (const_int 0)))
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(set (pc)
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(if_then_else (match_operator 2 "bt_comparison_operator"
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[(reg:CCZ FLAGS_REG) (const_int 0)])
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(match_operand 3)
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(pc)))]
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"peep2_regno_dead_p (3, FLAGS_REG)"
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[(set (match_dup 0)
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(match_op_dup 1 [(reg:CCZ FLAGS_REG) (const_int 0)]))
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(set (pc)
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(if_then_else (match_dup 2)
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(match_dup 3)
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(pc)))]
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{
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if (GET_CODE (operands[1]) == EQ)
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{
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operands[2] = shallow_copy_rtx (operands[2]);
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PUT_CODE (operands[2], reverse_condition (GET_CODE (operands[2])));
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}
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})
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;; The SSE store flag instructions saves 0 or 0xffffffff to the result.
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;; subsequent logical operations are used to imitate conditional moves.
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;; 0xffffffff is NaN, but not in normalized form, so we can't represent
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