* gcc/config/vax/vax.md: Spellcheck, fix whitespace.
From-SVN: r97430
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2 changed files with 10 additions and 7 deletions
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@ -1,3 +1,7 @@
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2005-04-01 Jan-Benedict Glaw <jbglaw@lug-owl.de>
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* gcc/config/vax/vax.md: Spellcheck, fix whitespace.
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2005-04-01 Ian Lance Taylor <ian@airs.com>
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* gcc.c: Don't include <sys/resource.h> or declare getrusage.
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@ -23,7 +23,7 @@
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;;- Instruction patterns. When multiple patterns apply,
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;;- the first one in the file is chosen.
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;;-
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;;- See file "rtl.def" for documentation on define_insn, match_*, et. al.
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;;- See file "rtl.def" for documentation on define_insn, match_*, et al.
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;;-
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;;- cpp macro #define NOTICE_UPDATE_CC in file tm.h handles condition code
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;;- updates for most instructions.
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@ -46,10 +46,9 @@
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(define_mode_macro VAXfp [SF DF])
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(define_mode_attr fsfx [(SF "f") (DF "%#")])
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;; Some ouput patterns want integer immediates with a prefix...
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;; Some output patterns want integer immediates with a prefix...
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(define_mode_attr iprefx [(QI "B") (HI "H") (SI "N")])
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;; We don't want to allow a constant operand for test insns because
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;; We don't want to allow a constant operand for test insns because
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;; (set (cc0) (const_int foo)) has no mode information. Such insns will
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;; be folded while optimizing anyway.
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@ -473,7 +472,7 @@
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(sign_extend:DI
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(match_operand:SI 2 "nonimmediate_operand" "g")))
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(match_operand:DI 3 "immediate_operand" "F")))]
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"GET_CODE (operands[3]) == CONST_DOUBLE
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"GET_CODE (operands[3]) == CONST_DOUBLE
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&& CONST_DOUBLE_HIGH (operands[3]) == (CONST_DOUBLE_LOW (operands[3]) >> 31)"
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"*
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{
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@ -608,7 +607,7 @@
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;; Arithmetic right shift on the VAX works by negating the shift count,
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;; then emitting a right shift with the shift count negated. This means
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;; that all actual shift counts in the RTL will be positive. This
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;; that all actual shift counts in the RTL will be positive. This
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;; prevents converting shifts to ZERO_EXTRACTs with negative positions,
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;; which isn't valid.
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(define_expand "ashrsi3"
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@ -1416,7 +1415,7 @@
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""
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"casel %0,$0,%1")
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;;- load or push effective address
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;;- load or push effective address
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;; These come after the move and add/sub patterns
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;; because we don't want pushl $1 turned into pushad 1.
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;; or addl3 r1,r2,r3 turned into movab 0(r1)[r2],r3.
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@ -1499,7 +1498,7 @@
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;; These used to be peepholes, but it is more straightforward to do them
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;; as single insns. However, we must force the output to be a register
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;; if it is not an offsettable address so that we know that we can assign
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;; to it twice.
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;; to it twice.
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;; If we had a good way of evaluating the relative costs, these could be
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;; machine-independent.
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