config/i386/i386.md (fpremxf4): Rename to fpremxf4_i387.
(fprem1xf4): Rename to fprem1xf4_i387. (fmodsf3, fmoddf3): Macroize patterns using X87MODEF12 mode macro. Rename patterns to fmod<mode>3. Use general_operand operand constraint for operands 1 and 2. Use SSE_FLOAT_MODE_P to disable patterns for SSE math. (remaindersf3, remainderdf3): Ditto. From-SVN: r119199
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e47930a8dc
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2 changed files with 69 additions and 105 deletions
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@ -1,3 +1,14 @@
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2006-11-25 Uros Bizjak <ubizjak@gmail.com>
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config/i386/i386.md (fpremxf4): Rename to fpremxf4_i387.
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(fprem1xf4): Rename to fprem1xf4_i387.
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(fmodsf3, fmoddf3): Macroize patterns using X87MODEF12 mode macro.
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Rename patterns to fmod<mode>3. Use general_operand operand
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constraint for operands 1 and 2. Use SSE_FLOAT_MODE_P to disable
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patterns for SSE math.
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(remaindersf3, remainderdf3): Ditto.
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2006-11-25 Joseph Myers <joseph@codesourcery.com>
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* function.c (instantiate_virtual_regs_in_insn): Call force_reg
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@ -252,7 +263,7 @@
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(erase_self_graph_edge): Ditto.
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(add_graph_edge): Removed.
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(get_graph_weights): Ditto.
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(allocate_graph_weights): Ditto. (
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(allocate_graph_weights): Ditto.
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(valid_weighted_graph_edge): Ditto
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(bitmap_other_than_zero_bit_set): Ditto.
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(int_add_graph_edge): Renamed to add_graph_edge.
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@ -15549,7 +15549,7 @@
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(set_attr "mode" "XF")
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(set_attr "athlon_decode" "direct")])
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(define_insn "sqrt<mode>xf2_i387"
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(define_insn "sqrt_extend<mode>xf2_i387"
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[(set (match_operand:XF 0 "register_operand" "=f")
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(sqrt:XF
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(float_extend:XF
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@ -15582,13 +15582,13 @@
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rtx op0 = gen_reg_rtx (XFmode);
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rtx op1 = force_reg (<MODE>mode, operands[1]);
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emit_insn (gen_sqrt<mode>xf2_i387 (op0, op1));
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emit_insn (gen_sqrt_extend<mode>xf2_i387 (op0, op1));
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emit_insn (gen_truncxf<mode>2_i387_noop_unspec (operands[0], op0));
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DONE;
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}
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})
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(define_insn "fpremxf4"
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(define_insn "fpremxf4_i387"
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[(set (match_operand:XF 0 "register_operand" "=f")
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(unspec:XF [(match_operand:XF 2 "register_operand" "0")
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(match_operand:XF 3 "register_operand" "1")]
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@ -15603,54 +15603,6 @@
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[(set_attr "type" "fpspc")
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(set_attr "mode" "XF")])
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(define_expand "fmodsf3"
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[(use (match_operand:SF 0 "register_operand" ""))
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(use (match_operand:SF 1 "register_operand" ""))
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(use (match_operand:SF 2 "register_operand" ""))]
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"TARGET_USE_FANCY_MATH_387
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&& (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387)"
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{
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rtx label = gen_label_rtx ();
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rtx op1 = gen_reg_rtx (XFmode);
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rtx op2 = gen_reg_rtx (XFmode);
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emit_insn(gen_extendsfxf2 (op1, operands[1]));
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emit_insn(gen_extendsfxf2 (op2, operands[2]));
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emit_label (label);
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emit_insn (gen_fpremxf4 (op1, op2, op1, op2));
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ix86_emit_fp_unordered_jump (label);
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emit_insn (gen_truncxfsf2_i387_noop_unspec (operands[0], op1));
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DONE;
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})
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(define_expand "fmoddf3"
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[(use (match_operand:DF 0 "register_operand" ""))
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(use (match_operand:DF 1 "register_operand" ""))
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(use (match_operand:DF 2 "register_operand" ""))]
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"TARGET_USE_FANCY_MATH_387
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&& (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387)"
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{
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rtx label = gen_label_rtx ();
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rtx op1 = gen_reg_rtx (XFmode);
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rtx op2 = gen_reg_rtx (XFmode);
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emit_insn (gen_extenddfxf2 (op1, operands[1]));
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emit_insn (gen_extenddfxf2 (op2, operands[2]));
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emit_label (label);
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emit_insn (gen_fpremxf4 (op1, op2, op1, op2));
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ix86_emit_fp_unordered_jump (label);
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emit_insn (gen_truncxfdf2_i387_noop_unspec (operands[0], op1));
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DONE;
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})
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(define_expand "fmodxf3"
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[(use (match_operand:XF 0 "register_operand" ""))
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(use (match_operand:XF 1 "register_operand" ""))
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@ -15661,15 +15613,39 @@
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emit_label (label);
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emit_insn (gen_fpremxf4 (operands[1], operands[2],
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operands[1], operands[2]));
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emit_insn (gen_fpremxf4_i387 (operands[1], operands[2],
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operands[1], operands[2]));
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ix86_emit_fp_unordered_jump (label);
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emit_move_insn (operands[0], operands[1]);
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DONE;
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})
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(define_insn "fprem1xf4"
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(define_expand "fmod<mode>3"
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[(use (match_operand:X87MODEF12 0 "register_operand" ""))
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(use (match_operand:X87MODEF12 1 "general_operand" ""))
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(use (match_operand:X87MODEF12 2 "general_operand" ""))]
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"TARGET_USE_FANCY_MATH_387
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&& (!(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
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|| TARGET_MIX_SSE_I387)"
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{
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rtx label = gen_label_rtx ();
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rtx op1 = gen_reg_rtx (XFmode);
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rtx op2 = gen_reg_rtx (XFmode);
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emit_insn(gen_extend<mode>xf2 (op1, operands[1]));
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emit_insn(gen_extend<mode>xf2 (op2, operands[2]));
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emit_label (label);
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emit_insn (gen_fpremxf4_i387 (op1, op2, op1, op2));
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ix86_emit_fp_unordered_jump (label);
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emit_insn (gen_truncxf<mode>2_i387_noop_unspec (operands[0], op1));
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DONE;
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})
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(define_insn "fprem1xf4_i387"
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[(set (match_operand:XF 0 "register_operand" "=f")
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(unspec:XF [(match_operand:XF 2 "register_operand" "0")
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(match_operand:XF 3 "register_operand" "1")]
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@ -15684,54 +15660,6 @@
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[(set_attr "type" "fpspc")
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(set_attr "mode" "XF")])
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(define_expand "remaindersf3"
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[(use (match_operand:SF 0 "register_operand" ""))
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(use (match_operand:SF 1 "register_operand" ""))
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(use (match_operand:SF 2 "register_operand" ""))]
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"TARGET_USE_FANCY_MATH_387
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&& (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387)"
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{
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rtx label = gen_label_rtx ();
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rtx op1 = gen_reg_rtx (XFmode);
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rtx op2 = gen_reg_rtx (XFmode);
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emit_insn(gen_extendsfxf2 (op1, operands[1]));
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emit_insn(gen_extendsfxf2 (op2, operands[2]));
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emit_label (label);
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emit_insn (gen_fprem1xf4 (op1, op2, op1, op2));
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ix86_emit_fp_unordered_jump (label);
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emit_insn (gen_truncxfsf2_i387_noop_unspec (operands[0], op1));
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DONE;
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})
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(define_expand "remainderdf3"
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[(use (match_operand:DF 0 "register_operand" ""))
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(use (match_operand:DF 1 "register_operand" ""))
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(use (match_operand:DF 2 "register_operand" ""))]
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"TARGET_USE_FANCY_MATH_387
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&& (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387)"
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{
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rtx label = gen_label_rtx ();
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rtx op1 = gen_reg_rtx (XFmode);
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rtx op2 = gen_reg_rtx (XFmode);
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emit_insn (gen_extenddfxf2 (op1, operands[1]));
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emit_insn (gen_extenddfxf2 (op2, operands[2]));
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emit_label (label);
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emit_insn (gen_fprem1xf4 (op1, op2, op1, op2));
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ix86_emit_fp_unordered_jump (label);
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emit_insn (gen_truncxfdf2_i387_noop_unspec (operands[0], op1));
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DONE;
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})
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(define_expand "remainderxf3"
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[(use (match_operand:XF 0 "register_operand" ""))
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(use (match_operand:XF 1 "register_operand" ""))
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@ -15742,14 +15670,39 @@
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emit_label (label);
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emit_insn (gen_fprem1xf4 (operands[1], operands[2],
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operands[1], operands[2]));
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emit_insn (gen_fprem1xf4_i387 (operands[1], operands[2],
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operands[1], operands[2]));
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ix86_emit_fp_unordered_jump (label);
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emit_move_insn (operands[0], operands[1]);
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DONE;
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})
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(define_expand "remainder<mode>3"
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[(use (match_operand:X87MODEF12 0 "register_operand" ""))
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(use (match_operand:X87MODEF12 1 "general_operand" ""))
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(use (match_operand:X87MODEF12 2 "general_operand" ""))]
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"TARGET_USE_FANCY_MATH_387
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&& (!(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
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|| TARGET_MIX_SSE_I387)"
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{
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rtx label = gen_label_rtx ();
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rtx op1 = gen_reg_rtx (XFmode);
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rtx op2 = gen_reg_rtx (XFmode);
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emit_insn(gen_extend<mode>xf2 (op1, operands[1]));
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emit_insn(gen_extend<mode>xf2 (op2, operands[2]));
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emit_label (label);
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emit_insn (gen_fprem1xf4_i387 (op1, op2, op1, op2));
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ix86_emit_fp_unordered_jump (label);
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emit_insn (gen_truncxf<mode>2_i387_noop_unspec (operands[0], op1));
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DONE;
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})
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(define_insn "*sindf2"
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[(set (match_operand:DF 0 "register_operand" "=f")
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(unspec:DF [(match_operand:DF 1 "register_operand" "0")] UNSPEC_SIN))]
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