h8300.c (shift_alg_qi): New.
* config/h8300/h8300.c (shift_alg_qi): New. (shift_alg_hi): Likewise. (shift_alg_si): Likewise. (get_shift_alg): Change the type of count to unsigned int. Use the tables. From-SVN: r46937
This commit is contained in:
Kazu Hirata
Kazu Hirata
parent
d676d94e5b
commit
769828abaf
2 changed files with 214 additions and 61 deletions
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@ -1,3 +1,11 @@
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2001-11-12 Kazu Hirata <kazu@hxi.com>
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* config/h8300/h8300.c (shift_alg_qi): New.
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(shift_alg_hi): Likewise.
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(shift_alg_si): Likewise.
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(get_shift_alg): Change the type of count to unsigned int.
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Use the tables.
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2001-11-11 Alexandre Oliva <aoliva@redhat.com>
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* Makefile.in (c-lang.o): Depend on $(VARRAY_H).
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@ -2154,6 +2154,142 @@ static const char *const rotate_two[3][3] =
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}
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};
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/* Macros to keep the shift algorithm tables small. */
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#define INL SHIFT_INLINE
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#define ROT SHIFT_ROT_AND
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#define LOP SHIFT_LOOP
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#define SPC SHIFT_SPECIAL
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/* The shift algorithms for each machine, mode, shift type, and shift
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count are defined below. The three tables below correspond to
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QImode, HImode, and SImode, respectively. Each table is organized
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by, in the order of indecies, machine, shift type, and shift count. */
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static const enum shift_alg shift_alg_qi[3][3][8] = {
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{
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/* TARGET_H8300 */
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/* 0 1 2 3 4 5 6 7 */
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{ INL, INL, INL, INL, INL, ROT, ROT, ROT }, /* SHIFT_ASHIFT */
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{ INL, INL, INL, INL, INL, ROT, ROT, ROT }, /* SHIFT_LSHIFTRT */
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{ INL, INL, INL, INL, INL, LOP, LOP, SPC } /* SHIFT_ASHIFTRT */
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},
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{
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/* TARGET_H8300H */
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/* 0 1 2 3 4 5 6 7 */
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{ INL, INL, INL, INL, INL, ROT, ROT, ROT }, /* SHIFT_ASHIFT */
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{ INL, INL, INL, INL, INL, ROT, ROT, ROT }, /* SHIFT_LSHIFTRT */
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{ INL, INL, INL, INL, INL, LOP, LOP, SPC } /* SHIFT_ASHIFTRT */
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},
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{
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/* TARGET_H8300S */
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/* 0 1 2 3 4 5 6 7 */
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{ INL, INL, INL, INL, INL, INL, INL, ROT }, /* SHIFT_ASHIFT */
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{ INL, INL, INL, INL, INL, INL, INL, ROT }, /* SHIFT_LSHIFTRT */
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{ INL, INL, INL, INL, INL, INL, INL, SPC } /* SHIFT_ASHIFTRT */
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}
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};
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static const enum shift_alg shift_alg_hi[3][3][16] = {
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{
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/* TARGET_H8300 */
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/* 0 1 2 3 4 5 6 7 */
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/* 8 9 10 11 12 13 14 15 */
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{ INL, INL, INL, INL, INL, LOP, LOP, SPC,
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SPC, SPC, SPC, SPC, SPC, LOP, LOP, ROT }, /* SHIFT_ASHIFT */
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{ INL, INL, INL, INL, INL, LOP, LOP, SPC,
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SPC, SPC, SPC, SPC, SPC, LOP, LOP, ROT }, /* SHIFT_LSHIFTRT */
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{ INL, INL, INL, INL, INL, LOP, LOP, SPC,
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SPC, SPC, SPC, SPC, SPC, LOP, LOP, SPC }, /* SHIFT_ASHIFTRT */
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},
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{
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/* TARGET_H8300H */
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/* 0 1 2 3 4 5 6 7 */
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/* 8 9 10 11 12 13 14 15 */
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{ INL, INL, INL, INL, INL, LOP, LOP, SPC,
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SPC, SPC, SPC, SPC, SPC, ROT, ROT, ROT }, /* SHIFT_ASHIFT */
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{ INL, INL, INL, INL, INL, LOP, LOP, SPC,
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SPC, SPC, SPC, SPC, SPC, ROT, ROT, ROT }, /* SHIFT_LSHIFTRT */
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{ INL, INL, INL, INL, INL, LOP, LOP, SPC,
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SPC, SPC, SPC, SPC, SPC, LOP, LOP, SPC }, /* SHIFT_ASHIFTRT */
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},
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{
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/* TARGET_H8300S */
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/* 0 1 2 3 4 5 6 7 */
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/* 8 9 10 11 12 13 14 15 */
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{ INL, INL, INL, INL, INL, INL, INL, INL,
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SPC, SPC, SPC, SPC, SPC, ROT, ROT, ROT }, /* SHIFT_ASHIFT */
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{ INL, INL, INL, INL, INL, INL, INL, INL,
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SPC, SPC, SPC, SPC, SPC, ROT, ROT, ROT }, /* SHIFT_LSHIFTRT */
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{ INL, INL, INL, INL, INL, INL, INL, INL,
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SPC, SPC, SPC, SPC, SPC, LOP, LOP, SPC }, /* SHIFT_ASHIFTRT */
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}
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};
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static const enum shift_alg shift_alg_si[3][3][32] = {
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{
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/* TARGET_H8300 */
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/* 0 1 2 3 4 5 6 7 */
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/* 8 9 10 11 12 13 14 15 */
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/* 16 17 18 19 20 21 22 23 */
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/* 24 25 26 27 28 29 30 31 */
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{ INL, INL, INL, LOP, LOP, LOP, LOP, LOP,
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SPC, LOP, LOP, LOP, LOP, LOP, LOP, LOP,
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SPC, LOP, LOP, LOP, LOP, LOP, LOP, LOP,
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LOP, LOP, LOP, LOP, LOP, LOP, LOP, SPC }, /* SHIFT_ASHIFT */
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{ INL, INL, INL, LOP, LOP, LOP, LOP, LOP,
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SPC, LOP, LOP, LOP, LOP, LOP, LOP, LOP,
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SPC, LOP, LOP, LOP, LOP, LOP, LOP, LOP,
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LOP, LOP, LOP, LOP, LOP, LOP, LOP, SPC }, /* SHIFT_LSHIFTRT */
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{ INL, INL, INL, LOP, LOP, LOP, LOP, LOP,
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SPC, LOP, LOP, LOP, LOP, LOP, LOP, LOP,
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SPC, LOP, LOP, LOP, LOP, LOP, LOP, LOP,
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LOP, LOP, LOP, LOP, LOP, LOP, LOP, SPC }, /* SHIFT_ASHIFTRT */
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},
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{
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/* TARGET_H8300H */
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/* 0 1 2 3 4 5 6 7 */
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/* 8 9 10 11 12 13 14 15 */
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/* 16 17 18 19 20 21 22 23 */
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/* 24 25 26 27 28 29 30 31 */
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{ INL, INL, INL, INL, INL, LOP, LOP, LOP,
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SPC, LOP, LOP, LOP, LOP, LOP, LOP, LOP,
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SPC, SPC, SPC, SPC, LOP, LOP, LOP, LOP,
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SPC, LOP, LOP, LOP, ROT, ROT, ROT, ROT }, /* SHIFT_ASHIFT */
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{ INL, INL, INL, INL, INL, LOP, LOP, LOP,
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SPC, LOP, LOP, LOP, LOP, LOP, LOP, LOP,
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SPC, SPC, SPC, SPC, LOP, LOP, LOP, LOP,
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SPC, LOP, LOP, LOP, ROT, ROT, ROT, ROT }, /* SHIFT_LSHIFTRT */
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{ INL, INL, INL, INL, INL, LOP, LOP, LOP,
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SPC, LOP, LOP, LOP, LOP, LOP, LOP, LOP,
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SPC, SPC, SPC, SPC, LOP, LOP, LOP, LOP,
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SPC, LOP, LOP, LOP, LOP, LOP, LOP, SPC }, /* SHIFT_ASHIFTRT */
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},
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{
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/* TARGET_H8300S */
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/* 0 1 2 3 4 5 6 7 */
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/* 8 9 10 11 12 13 14 15 */
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/* 16 17 18 19 20 21 22 23 */
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/* 24 25 26 27 28 29 30 31 */
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{ INL, INL, INL, INL, INL, INL, INL, INL,
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INL, INL, INL, LOP, LOP, LOP, LOP, LOP,
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SPC, SPC, SPC, SPC, SPC, LOP, LOP, LOP,
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SPC, LOP, LOP, LOP, ROT, ROT, ROT, ROT }, /* SHIFT_ASHIFT */
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{ INL, INL, INL, INL, INL, INL, INL, INL,
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INL, INL, INL, LOP, LOP, LOP, LOP, LOP,
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SPC, SPC, SPC, SPC, SPC, LOP, LOP, LOP,
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SPC, LOP, LOP, LOP, ROT, ROT, ROT, ROT }, /* SHIFT_LSHIFTRT */
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{ INL, INL, INL, INL, INL, INL, INL, INL,
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INL, INL, INL, LOP, LOP, LOP, LOP, LOP,
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SPC, SPC, SPC, SPC, SPC, LOP, LOP, LOP,
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SPC, LOP, LOP, LOP, LOP, LOP, LOP, SPC }, /* SHIFT_ASHIFTRT */
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}
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};
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#undef INL
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#undef ROT
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#undef LOP
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#undef SPC
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struct shift_info {
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/* Shift algorithm. */
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enum shift_alg alg;
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@ -2178,7 +2314,7 @@ struct shift_info {
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};
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static void get_shift_alg PARAMS ((enum shift_type,
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enum shift_mode, int,
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enum shift_mode, unsigned int,
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struct shift_info *));
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/* Given SHIFT_TYPE, SHIFT_MODE, and shift count COUNT, determine the
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@ -2198,9 +2334,19 @@ static void
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get_shift_alg (shift_type, shift_mode, count, info)
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enum shift_type shift_type;
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enum shift_mode shift_mode;
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int count;
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unsigned int count;
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struct shift_info *info;
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{
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int cpu;
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/* Find the target CPU. */
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if (TARGET_H8300)
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cpu = 0;
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else if (TARGET_H8300H)
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cpu = 1;
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else
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cpu = 2;
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/* In case we end up with SHIFT_SPECIAL, initialize REMAINDER to 0. */
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info->remainder = 0;
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@ -2214,37 +2360,47 @@ get_shift_alg (shift_type, shift_mode, count, info)
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switch (shift_mode)
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{
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case QIshift:
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if (count <= 4)
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goto return_shift_inline;
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else
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if (GET_MODE_BITSIZE (QImode) <= count)
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goto return_shift_loop;
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switch (shift_alg_qi[cpu][shift_type][count])
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{
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/* Shift by 5/6 are only 3 insns on the H8/S, so it's just as
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fast as SHIFT_ROT_AND, plus CC is valid. */
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if (TARGET_H8300S && count <= 6)
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goto return_shift_inline;
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/* For ASHIFTRT by 7 bits, the sign bit is simply replicated
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through the entire value. */
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if (shift_type == SHIFT_ASHIFTRT && count == 7)
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{
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info->special = "shll\t%X0\n\tsubx\t%X0,%X0";
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goto return_shift_special;
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}
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/* Other ASHIFTRTs are too much of a pain. */
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if (shift_type == SHIFT_ASHIFTRT)
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goto return_shift_loop;
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/* Other shifts by 5, 6, or 7 bits use SHIFT_ROT_AND. */
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case SHIFT_INLINE:
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goto return_shift_inline;
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case SHIFT_LOOP:
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goto return_shift_loop;
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case SHIFT_ROT_AND:
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goto return_shift_rot_and;
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case SHIFT_SPECIAL:
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;
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}
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/* For ASHIFTRT by 7 bits, the sign bit is simply replicated
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through the entire value. */
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if (shift_type == SHIFT_ASHIFTRT && count == 7)
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{
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info->special = "shll\t%X0\n\tsubx\t%X0,%X0";
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goto return_shift_special;
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}
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abort ();
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case HIshift:
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if (count <= 4)
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goto return_shift_inline;
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else if (TARGET_H8300S && count <= 7)
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goto return_shift_inline;
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else if (count == 7)
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if (GET_MODE_BITSIZE (HImode) <= count)
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goto return_shift_loop;
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switch (shift_alg_hi[cpu][shift_type][count])
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{
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case SHIFT_INLINE:
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goto return_shift_inline;
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case SHIFT_LOOP:
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goto return_shift_loop;
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case SHIFT_ROT_AND:
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goto return_shift_rot_and;
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case SHIFT_SPECIAL:
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;
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}
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if (count == 7)
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{
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if (shift_type == SHIFT_ASHIFT && TARGET_H8300)
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{
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@ -2302,27 +2458,31 @@ get_shift_alg (shift_type, shift_mode, count, info)
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goto return_shift_special;
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}
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}
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else if ((!TARGET_H8300 && (count == 13 || count == 14))
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|| count == 15)
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else if (count == 15 && shift_type == SHIFT_ASHIFTRT)
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{
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if (count == 15 && shift_type == SHIFT_ASHIFTRT)
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{
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info->special = "shll\t%t0\n\tsubx\t%t0,%t0\n\tmov.b\t%t0,%s0";
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goto return_shift_special;
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}
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else if (shift_type != SHIFT_ASHIFTRT)
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{
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goto return_shift_rot_and;
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}
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info->special = "shll\t%t0\n\tsubx\t%t0,%t0\n\tmov.b\t%t0,%s0";
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goto return_shift_special;
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}
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break;
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abort ();
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case SIshift:
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if (count <= (TARGET_H8300 ? 2 : 4))
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goto return_shift_inline;
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else if (TARGET_H8300S && count <= 10)
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goto return_shift_inline;
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else if (count == 8 && TARGET_H8300)
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if (GET_MODE_BITSIZE (SImode) <= count)
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goto return_shift_loop;
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info->alg = shift_alg_si[cpu][shift_type][count];
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switch (info->alg)
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{
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case SHIFT_INLINE:
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goto return_shift_inline;
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case SHIFT_LOOP:
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goto return_shift_loop;
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case SHIFT_ROT_AND:
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goto return_shift_rot_and;
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case SHIFT_SPECIAL:
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;
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}
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if (count == 8 && TARGET_H8300)
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{
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switch (shift_type)
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{
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@ -2395,17 +2555,6 @@ get_shift_alg (shift_type, shift_mode, count, info)
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goto return_shift_special;
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}
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}
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else if (count >= 28 && count <= 30 && !TARGET_H8300)
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{
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if (shift_type == SHIFT_ASHIFTRT)
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{
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goto return_shift_loop;
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}
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else
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{
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goto return_shift_rot_and;
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}
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}
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else if (count == 31)
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{
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if (shift_type == SHIFT_ASHIFTRT)
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@ -2426,13 +2575,9 @@ get_shift_alg (shift_type, shift_mode, count, info)
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info->special = "sub.w\t%f0,%f0\n\tshll\t%z0\n\tmov.w\t%f0,%e0\n\trotxl\t%w0";
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goto return_shift_special;
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}
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else
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{
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goto return_shift_rot_and;
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}
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}
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}
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break;
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abort ();
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default:
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abort ();
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Reference in a new issue