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avx512bwintrin.h: Add new k-mask intrinsics.

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* config/i386/avx512bwintrin.h: Add new k-mask intrinsics.
	* config/i386/avx512dqintrin.h: Ditto.
	* config/i386/avx512fintrin.h: Ditto.
	* config/i386/i386-builtin.def (__builtin_ia32_kaddqi,
	__builtin_ia32_kaddhi, __builtin_ia32_kaddsi,
	__builtin_ia32_kadddi): New.
	* config/i386/sse.md (kadd<mode>): New.

testsuite/ChangeLog:

	* gcc.target/i386/avx512bw-kaddd-1.c: New test.
	* gcc.target/i386/avx512bw-kaddq-1.c: Ditto.
	* gcc.target/i386/avx512dq-kaddb-1.c: Ditto.
	* gcc.target/i386/avx512f-kaddw-1.c: Ditto.

From-SVN: r243774
This commit is contained in:
Andrew Senkevich 2016-12-17 12:42:05 +01:00 • committed by Uros Bizjak
parent 52fd48aeea
commit 75d727d2d0
11 changed files with 113 additions and 4 deletions
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10
gcc/ChangeLog
View file

@ -1,3 +1,13 @@
2016-12-17 Andrew Senkevich <andrew.senkevich@intel.com>
* config/i386/avx512bwintrin.h: Add new k-mask intrinsics.
* config/i386/avx512dqintrin.h: Ditto.
* config/i386/avx512fintrin.h: Ditto.
* config/i386/i386-builtin.def (__builtin_ia32_kaddqi,
__builtin_ia32_kaddhi, __builtin_ia32_kaddsi,
__builtin_ia32_kadddi): New.
* config/i386/sse.md (kadd<mode>): New.
2016-12-17 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (*tzcnt<mode>_1): Merge *tzcnt<mode>_1_falsedep_1

14
gcc/config/i386/avx512bwintrin.h
View file

@ -40,6 +40,20 @@ typedef char __v64qi __attribute__ ((__vector_size__ (64)));
typedef unsigned long long __mmask64;
extern __inline __mmask32
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_kadd_mask32 (__mmask32 __A, __mmask32 __B)
{
return (__mmask32) __builtin_ia32_kaddsi ((__mmask32) __A, (__mmask32) __B);
}
extern __inline __mmask64
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_kadd_mask64 (__mmask64 __A, __mmask64 __B)
{
return (__mmask64) __builtin_ia32_kadddi ((__mmask64) __A, (__mmask64) __B);
}
extern __inline unsigned int
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_cvtmask32_u32 (__mmask32 __A)

7
gcc/config/i386/avx512dqintrin.h
View file

@ -34,6 +34,13 @@
#define __DISABLE_AVX512DQ__
#endif /* __AVX512DQ__ */
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_kadd_mask8 (__mmask8 __A, __mmask8 __B)
{
return (__mmask8) __builtin_ia32_kaddqi ((__mmask8) __A, (__mmask8) __B);
}
extern __inline unsigned int
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_cvtmask8_u32 (__mmask8 __A)

7
gcc/config/i386/avx512fintrin.h
View file

@ -9984,6 +9984,13 @@ _mm512_maskz_expandloadu_epi32 (__mmask16 __U, void const *__P)
#define _kxnor_mask16 _mm512_kxnor
#define _kxor_mask16 _mm512_kxor
extern __inline __mmask16
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_kadd_mask16 (__mmask16 __A, __mmask16 __B)
{
return (__mmask16) __builtin_ia32_kaddhi ((__mmask16) __A, (__mmask16) __B);
}
extern __inline unsigned int
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_cvtmask16_u32 (__mmask16 __A)

4
gcc/config/i386/i386-builtin.def
View file

@ -1471,6 +1471,10 @@ BDESC (OPTION_MASK_ISA_AVX512DQ, CODE_FOR_kmovb, "__builtin_ia32_kmovb", IX86_BU
BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_kmovw, "__builtin_ia32_kmovw", IX86_BUILTIN_KMOV16, UNKNOWN, (int) UHI_FTYPE_UHI)
BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FOR_kmovd, "__builtin_ia32_kmovd", IX86_BUILTIN_KMOV32, UNKNOWN, (int) USI_FTYPE_USI)
BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FOR_kmovq, "__builtin_ia32_kmovq", IX86_BUILTIN_KMOV64, UNKNOWN, (int) UDI_FTYPE_UDI)
BDESC (OPTION_MASK_ISA_AVX512DQ, CODE_FOR_kaddqi, "__builtin_ia32_kaddqi", IX86_BUILTIN_KADD8, UNKNOWN, (int) UQI_FTYPE_UQI_UQI)
BDESC (OPTION_MASK_ISA_AVX512F, CODE_FOR_kaddhi, "__builtin_ia32_kaddhi", IX86_BUILTIN_KADD16, UNKNOWN, (int) UHI_FTYPE_UHI_UHI)
BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FOR_kaddsi, "__builtin_ia32_kaddsi", IX86_BUILTIN_KADD32, UNKNOWN, (int) USI_FTYPE_USI_USI)
BDESC (OPTION_MASK_ISA_AVX512BW, CODE_FOR_kadddi, "__builtin_ia32_kadddi", IX86_BUILTIN_KADD64, UNKNOWN, (int) UDI_FTYPE_UDI_UDI)
/* SHA */
BDESC (OPTION_MASK_ISA_SSE2, CODE_FOR_sha1msg1, 0, IX86_BUILTIN_SHA1MSG1, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI)

18
gcc/config/i386/sse.md
View file

@ -1306,9 +1306,6 @@
(define_mode_iterator SWI1248_AVX512BW
[QI HI (SI "TARGET_AVX512BW") (DI "TARGET_AVX512BW")])
;; Mask variant shift mnemonics
(define_code_attr mshift [(ashift "shiftl") (lshiftrt "shiftr")])
(define_expand "kmov<mskmodesuffix>"
[(set (match_operand:SWI1248_AVX512BWDQ 0 "nonimmediate_operand")
(match_operand:SWI1248_AVX512BWDQ 1 "nonimmediate_operand"))]
@ -1404,6 +1401,21 @@
]
(const_string "<MODE>")))])
(define_insn "kadd<mode>"
[(set (match_operand:SWI1248_AVX512BWDQ 0 "register_operand" "=k")
(plus:SWI1248_AVX512BWDQ
(match_operand:SWI1248_AVX512BWDQ 1 "register_operand" "k")
(match_operand:SWI1248_AVX512BWDQ 2 "register_operand" "k")))
(unspec [(const_int 0)] UNSPEC_MASKOP)]
"TARGET_AVX512F"
"kadd<mskmodesuffix>\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "type" "msklog")
(set_attr "prefix" "vex")
(set_attr "mode" "<MODE>")])
;; Mask variant shift mnemonics
(define_code_attr mshift [(ashift "shiftl") (lshiftrt "shiftr")])
(define_insn "*k<code><mode>"
[(set (match_operand:SWI1248_AVX512BWDQ 0 "register_operand" "=k")
(any_lshift:SWI1248_AVX512BWDQ

9
gcc/testsuite/ChangeLog
View file

@ -1,3 +1,10 @@
2016-12-17 Andrew Senkevich <andrew.senkevich@intel.com>
* gcc.target/i386/avx512bw-kaddd-1.c: New test.
* gcc.target/i386/avx512bw-kaddq-1.c: Ditto.
* gcc.target/i386/avx512dq-kaddb-1.c: Ditto.
* gcc.target/i386/avx512f-kaddw-1.c: Ditto.
2016-12-17 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/78239
@ -224,7 +231,7 @@
2016-12-14 Toma Tabacu <toma.tabacu@imgtec.com>
* gcc.target/mips/msa-builtins-err.c (dg-options): Add
* gcc.target/mips/msa-builtins-err.c (dg-options): Add
-ffat-lto-objects option.
2016-12-14 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>

12
gcc/testsuite/gcc.target/i386/avx512bw-kaddd-1.c Normal file
View file

@ -0,0 +1,12 @@
/* { dg-do compile } */
/* { dg-options "-mavx512bw -O2" } */
/* { dg-final { scan-assembler-times "kaddd\[ \\t\]+\[^\{\n\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */
#include <immintrin.h>
void
avx512bw_test ()
{
__mmask32 k = _kadd_mask32 (11, 12);
asm volatile ("" : "+k" (k));
}

12
gcc/testsuite/gcc.target/i386/avx512bw-kaddq-1.c Normal file
View file

@ -0,0 +1,12 @@
/* { dg-do compile } */
/* { dg-options "-mavx512bw -O2" } */
/* { dg-final { scan-assembler-times "kaddq\[ \\t\]+\[^\{\n\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */
#include <immintrin.h>
void
avx512bw_test ()
{
__mmask64 k = _kadd_mask64 (11, 12);
asm volatile ("" : "+k" (k));
}

12
gcc/testsuite/gcc.target/i386/avx512dq-kaddb-1.c Normal file
View file

@ -0,0 +1,12 @@
/* { dg-do compile } */
/* { dg-options "-mavx512dq -O2" } */
/* { dg-final { scan-assembler-times "kaddb\[ \\t\]+\[^\{\n\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */
#include <immintrin.h>
void
avx512dq_test ()
{
__mmask8 k = _kadd_mask8 (11, 12);
asm volatile ("" : "+k" (k));
}

12
gcc/testsuite/gcc.target/i386/avx512f-kaddw-1.c Normal file
View file

@ -0,0 +1,12 @@
/* { dg-do compile } */
/* { dg-options "-mavx512f -O2" } */
/* { dg-final { scan-assembler-times "kaddw\[ \\t\]+\[^\{\n\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */
#include <immintrin.h>
void
avx512f_test ()
{
__mmask16 k = _kadd_mask16 (11, 12);
asm volatile ("" : "+k" (k));
}