arm testsuite: XFAIL or relax registers in some tests [PR109697]

Hi all,

This is a simple testsuite tidy-up patch, addressing to types of errors:

* The vcmp vector-scalar tests failing due to the compiler's preference
of vector-vector comparisons, over vector-scalar comparisons. This is
due to the lack of cost model for MVE and the compiler not knowing that
the RTL vec_duplicate is free in those instructions. For now, we simply
XFAIL these checks.
* The tests for pr108177 had strict usage of q0 and r0 registers,
meaning that they would FAIL with -mfloat-abi=softf. The register checks
have now been relaxed. A couple of these run-tests also had incosistent
use of integer MVE with floating point vectors, so I've now changed these
to use FP MVE.

gcc/testsuite/ChangeLog:
	PR target/109697
	* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c: XFAIL check.
	* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c: XFAIL check.
	* gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c: XFAIL check.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c: XFAIL check.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c: XFAIL check.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c: XFAIL check.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c: XFAIL check.
	* gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c: XFAIL check.
	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c: XFAIL check.
	* gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c: XFAIL check.
	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: XFAIL check.
	* gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c: XFAIL check.
	* gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c: XFAIL check.
	* gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c: XFAIL check.
	* gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c: XFAIL check.
	* gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c: XFAIL check.
	* gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c: XFAIL check.
	* gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c: XFAIL check.
	* gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c: XFAIL check.
	* gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c: XFAIL check.
	* gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c: XFAIL check.
	* gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c: XFAIL check.
	* gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c: XFAIL check.
	* gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c: XFAIL check.
	* gcc.target/arm/mve/pr108177-1.c: Relax registers.
	* gcc.target/arm/mve/pr108177-10.c: Relax registers.
	* gcc.target/arm/mve/pr108177-11.c: Relax registers.
	* gcc.target/arm/mve/pr108177-12.c: Relax registers.
	* gcc.target/arm/mve/pr108177-13.c: Relax registers.
	* gcc.target/arm/mve/pr108177-13-run.c: use mve_fp
	* gcc.target/arm/mve/pr108177-14.c: Relax registers.
	* gcc.target/arm/mve/pr108177-14-run.c: use mve_fp
	* gcc.target/arm/mve/pr108177-2.c: Relax registers.
	* gcc.target/arm/mve/pr108177-3.c: Relax registers.
	* gcc.target/arm/mve/pr108177-4.c: Relax registers.
	* gcc.target/arm/mve/pr108177-5.c: Relax registers.
	* gcc.target/arm/mve/pr108177-6.c: Relax registers.
	* gcc.target/arm/mve/pr108177-7.c: Relax registers.
	* gcc.target/arm/mve/pr108177-8.c: Relax registers.
	* gcc.target/arm/mve/pr108177-9.c: Relax registers.
This commit is contained in:
Stam Markianos-Wright 2023-04-27 15:54:16 +01:00
parent 8c0c310a4f
commit 7587c2e384
40 changed files with 54 additions and 54 deletions

View file

@ -39,7 +39,7 @@ foo1 (uint16x8_t a, uint16_t b)
}
/*
**foo2:
**foo2: { xfail *-*-* }
** ...
** vcmp.u16 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...

View file

@ -39,7 +39,7 @@ foo1 (uint32x4_t a, uint32_t b)
}
/*
**foo2:
**foo2: { xfail *-*-* }
** ...
** vcmp.u32 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...

View file

@ -39,7 +39,7 @@ foo1 (uint8x16_t a, uint8_t b)
}
/*
**foo2:
**foo2: { xfail *-*-* }
** ...
** vcmp.u8 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...

View file

@ -39,7 +39,7 @@ foo1 (float16x8_t a, float16_t b)
}
/*
**foo2:
**foo2: { xfail *-*-* }
** ...
** vcmp.f16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...

View file

@ -39,7 +39,7 @@ foo1 (float32x4_t a, float32_t b)
}
/*
**foo2:
**foo2: { xfail *-*-* }
** ...
** vcmp.f32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...

View file

@ -39,7 +39,7 @@ foo1 (uint16x8_t a, uint16_t b)
}
/*
**foo2:
**foo2: { xfail *-*-* }
** ...
** vcmp.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...

View file

@ -39,7 +39,7 @@ foo1 (uint32x4_t a, uint32_t b)
}
/*
**foo2:
**foo2: { xfail *-*-* }
** ...
** vcmp.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...

View file

@ -39,7 +39,7 @@ foo1 (uint8x16_t a, uint8_t b)
}
/*
**foo2:
**foo2: { xfail *-*-* }
** ...
** vcmp.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...

View file

@ -39,7 +39,7 @@ foo1 (float16x8_t a, float16_t b)
}
/*
**foo2:
**foo2: { xfail *-*-* }
** ...
** vcmp.f16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...

View file

@ -39,7 +39,7 @@ foo1 (float32x4_t a, float32_t b)
}
/*
**foo2:
**foo2: { xfail *-*-* }
** ...
** vcmp.f32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...

View file

@ -39,7 +39,7 @@ foo1 (float16x8_t a, float16_t b)
}
/*
**foo2:
**foo2: { xfail *-*-* }
** ...
** vcmp.f16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...

View file

@ -39,7 +39,7 @@ foo1 (float32x4_t a, float32_t b)
}
/*
**foo2:
**foo2: { xfail *-*-* }
** ...
** vcmp.f32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...

View file

@ -39,7 +39,7 @@ foo1 (uint16x8_t a, uint16_t b)
}
/*
**foo2:
**foo2: { xfail *-*-* }
** ...
** vcmp.u16 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...

View file

@ -39,7 +39,7 @@ foo1 (uint32x4_t a, uint32_t b)
}
/*
**foo2:
**foo2: { xfail *-*-* }
** ...
** vcmp.u32 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...

View file

@ -39,7 +39,7 @@ foo1 (uint8x16_t a, uint8_t b)
}
/*
**foo2:
**foo2: { xfail *-*-* }
** ...
** vcmp.u8 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...

View file

@ -39,7 +39,7 @@ foo1 (float16x8_t a, float16_t b)
}
/*
**foo2:
**foo2: { xfail *-*-* }
** ...
** vcmp.f16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...

View file

@ -39,7 +39,7 @@ foo1 (float32x4_t a, float32_t b)
}
/*
**foo2:
**foo2: { xfail *-*-* }
** ...
** vcmp.f32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...

View file

@ -39,7 +39,7 @@ foo1 (float16x8_t a, float16_t b)
}
/*
**foo2:
**foo2: { xfail *-*-* }
** ...
** vcmp.f16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...

View file

@ -39,7 +39,7 @@ foo1 (float32x4_t a, float32_t b)
}
/*
**foo2:
**foo2: { xfail *-*-* }
** ...
** vcmp.f32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...

View file

@ -39,7 +39,7 @@ foo1 (float16x8_t a, float16_t b)
}
/*
**foo2:
**foo2: { xfail *-*-* }
** ...
** vcmp.f16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...

View file

@ -39,7 +39,7 @@ foo1 (float32x4_t a, float32_t b)
}
/*
**foo2:
**foo2: { xfail *-*-* }
** ...
** vcmp.f32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...

View file

@ -39,7 +39,7 @@ foo1 (uint16x8_t a, uint16_t b)
}
/*
**foo2:
**foo2: { xfail *-*-* }
** ...
** vcmp.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...

View file

@ -39,7 +39,7 @@ foo1 (uint32x4_t a, uint32_t b)
}
/*
**foo2:
**foo2: { xfail *-*-* }
** ...
** vcmp.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...

View file

@ -39,7 +39,7 @@ foo1 (uint8x16_t a, uint8_t b)
}
/*
**foo2:
**foo2: { xfail *-*-* }
** ...
** vcmp.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...

View file

@ -7,9 +7,9 @@
/*
** test:
**...
** vstrbt.8 q0, \[r0\]
** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
**...
** vstrbt.8 q0, \[r0\]
** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
**...
*/

View file

@ -7,9 +7,9 @@
/*
** test:
**...
** vstrht.32 q0, \[r0\]
** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
**...
** vstrht.32 q0, \[r0\]
** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
**...
*/

View file

@ -7,9 +7,9 @@
/*
** test:
**...
** vstrwt.32 q0, \[r0\]
** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
**...
** vstrwt.32 q0, \[r0\]
** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
**...
*/

View file

@ -7,9 +7,9 @@
/*
** test:
**...
** vstrwt.32 q0, \[r0\]
** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
**...
** vstrwt.32 q0, \[r0\]
** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
**...
*/

View file

@ -1,6 +1,6 @@
/* { dg-do run } */
/* { dg-require-effective-target arm_mve_hw } */
/* { dg-options "-O2" } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-add-options arm_v8_1m_mve_fp } */
#include "pr108177-13.c"

View file

@ -7,9 +7,9 @@
/*
** test:
**...
** vstrht.16 q0, \[r0\]
** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
**...
** vstrht.16 q0, \[r0\]
** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
**...
*/

View file

@ -1,6 +1,6 @@
/* { dg-do run } */
/* { dg-require-effective-target arm_mve_hw } */
/* { dg-options "-O2" } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-add-options arm_v8_1m_mve_fp } */
#include "pr108177-14.c"

View file

@ -7,9 +7,9 @@
/*
** test:
**...
** vstrwt.32 q0, \[r0\]
** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
**...
** vstrwt.32 q0, \[r0\]
** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
**...
*/

View file

@ -7,9 +7,9 @@
/*
** test:
**...
** vstrbt.8 q0, \[r0\]
** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
**...
** vstrbt.8 q0, \[r0\]
** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
**...
*/

View file

@ -7,9 +7,9 @@
/*
** test:
**...
** vstrbt.16 q0, \[r0\]
** vstrbt.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
**...
** vstrbt.16 q0, \[r0\]
** vstrbt.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
**...
*/

View file

@ -7,9 +7,9 @@
/*
** test:
**...
** vstrbt.16 q0, \[r0\]
** vstrbt.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
**...
** vstrbt.16 q0, \[r0\]
** vstrbt.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
**...
*/

View file

@ -7,9 +7,9 @@
/*
** test:
**...
** vstrbt.32 q0, \[r0\]
** vstrbt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
**...
** vstrbt.32 q0, \[r0\]
** vstrbt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
**...
*/

View file

@ -7,9 +7,9 @@
/*
** test:
**...
** vstrbt.32 q0, \[r0\]
** vstrbt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
**...
** vstrbt.32 q0, \[r0\]
** vstrbt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
**...
*/

View file

@ -7,9 +7,9 @@
/*
** test:
**...
** vstrht.16 q0, \[r0\]
** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
**...
** vstrht.16 q0, \[r0\]
** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
**...
*/

View file

@ -7,9 +7,9 @@
/*
** test:
**...
** vstrht.16 q0, \[r0\]
** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
**...
** vstrht.16 q0, \[r0\]
** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
**...
*/

View file

@ -7,9 +7,9 @@
/*
** test:
**...
** vstrht.32 q0, \[r0\]
** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
**...
** vstrht.32 q0, \[r0\]
** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\]
**...
*/