re PR target/93078 (Missing fma and round functions auto-vectorization with x86-64 (sse2))
PR target/93078 * config/i386/i386-builtins.c (ix86_builtin_vectorized_function): Remove CASE_CFN_RINT handling. * config/i386/i386-builtin.def (IX86_BUILTIN_RINTPD, IX86_BUILTIN_RINTPS, IX86_BUILTIN_RINTPD256, IX86_BUILTIN_RINTPS256): Remove. * config/i386/sse.md (nearbyint<mode>2, rint<mode>2): New expanders with VF iterator. * gcc.target/i386/sse4_1-pr93078.c: New test. * gcc.target/i386/avx-pr93078.c: New test. * gcc.target/i386/avx512f-pr93078.c: New test. From-SVN: r279754
This commit is contained in:
Jakub Jelinek
Jakub Jelinek
parent
f065751606
commit
6ec067548f
8 changed files with 96 additions and 25 deletions
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@ -1,3 +1,14 @@
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2019-12-29 Jakub Jelinek <jakub@redhat.com>
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PR target/93078
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* config/i386/i386-builtins.c (ix86_builtin_vectorized_function):
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Remove CASE_CFN_RINT handling.
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* config/i386/i386-builtin.def (IX86_BUILTIN_RINTPD,
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IX86_BUILTIN_RINTPS, IX86_BUILTIN_RINTPD256, IX86_BUILTIN_RINTPS256):
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Remove.
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* config/i386/sse.md (nearbyint<mode>2, rint<mode>2): New expanders
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with VF iterator.
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2019-12-29 Richard Sandiford <richard.sandiford@arm.com>
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* tree-vect-stmts.c (vect_get_strided_load_store_ops): Copy
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@ -913,7 +913,6 @@ BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_roundss, "__builtin_ia32_round
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BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_roundpd, "__builtin_ia32_floorpd", IX86_BUILTIN_FLOORPD, (enum rtx_code) ROUND_FLOOR, (int) V2DF_FTYPE_V2DF_ROUND)
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BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_roundpd, "__builtin_ia32_ceilpd", IX86_BUILTIN_CEILPD, (enum rtx_code) ROUND_CEIL, (int) V2DF_FTYPE_V2DF_ROUND)
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BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_roundpd, "__builtin_ia32_truncpd", IX86_BUILTIN_TRUNCPD, (enum rtx_code) ROUND_TRUNC, (int) V2DF_FTYPE_V2DF_ROUND)
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BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_roundpd, "__builtin_ia32_rintpd", IX86_BUILTIN_RINTPD, (enum rtx_code) ROUND_MXCSR, (int) V2DF_FTYPE_V2DF_ROUND)
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BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_roundpd_vec_pack_sfix, "__builtin_ia32_floorpd_vec_pack_sfix", IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX, (enum rtx_code) ROUND_FLOOR, (int) V4SI_FTYPE_V2DF_V2DF_ROUND)
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BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_roundpd_vec_pack_sfix, "__builtin_ia32_ceilpd_vec_pack_sfix", IX86_BUILTIN_CEILPD_VEC_PACK_SFIX, (enum rtx_code) ROUND_CEIL, (int) V4SI_FTYPE_V2DF_V2DF_ROUND)
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@ -924,7 +923,6 @@ BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_roundv2df2_vec_pack_sfix, "__builtin_
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BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_roundps, "__builtin_ia32_floorps", IX86_BUILTIN_FLOORPS, (enum rtx_code) ROUND_FLOOR, (int) V4SF_FTYPE_V4SF_ROUND)
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BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_roundps, "__builtin_ia32_ceilps", IX86_BUILTIN_CEILPS, (enum rtx_code) ROUND_CEIL, (int) V4SF_FTYPE_V4SF_ROUND)
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BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_roundps, "__builtin_ia32_truncps", IX86_BUILTIN_TRUNCPS, (enum rtx_code) ROUND_TRUNC, (int) V4SF_FTYPE_V4SF_ROUND)
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BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_roundps, "__builtin_ia32_rintps", IX86_BUILTIN_RINTPS, (enum rtx_code) ROUND_MXCSR, (int) V4SF_FTYPE_V4SF_ROUND)
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BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_roundps_sfix, "__builtin_ia32_floorps_sfix", IX86_BUILTIN_FLOORPS_SFIX, (enum rtx_code) ROUND_FLOOR, (int) V4SI_FTYPE_V4SF_ROUND)
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BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_roundps_sfix, "__builtin_ia32_ceilps_sfix", IX86_BUILTIN_CEILPS_SFIX, (enum rtx_code) ROUND_CEIL, (int) V4SI_FTYPE_V4SF_ROUND)
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@ -1047,7 +1045,6 @@ BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_roundps256, "__builtin_ia32_roundps2
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BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_roundpd256, "__builtin_ia32_floorpd256", IX86_BUILTIN_FLOORPD256, (enum rtx_code) ROUND_FLOOR, (int) V4DF_FTYPE_V4DF_ROUND)
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BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_roundpd256, "__builtin_ia32_ceilpd256", IX86_BUILTIN_CEILPD256, (enum rtx_code) ROUND_CEIL, (int) V4DF_FTYPE_V4DF_ROUND)
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BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_roundpd256, "__builtin_ia32_truncpd256", IX86_BUILTIN_TRUNCPD256, (enum rtx_code) ROUND_TRUNC, (int) V4DF_FTYPE_V4DF_ROUND)
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BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_roundpd256, "__builtin_ia32_rintpd256", IX86_BUILTIN_RINTPD256, (enum rtx_code) ROUND_MXCSR, (int) V4DF_FTYPE_V4DF_ROUND)
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BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_roundv4df2, "__builtin_ia32_roundpd_az256", IX86_BUILTIN_ROUNDPD_AZ256, UNKNOWN, (int) V4DF_FTYPE_V4DF)
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BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_roundv4df2_vec_pack_sfix, "__builtin_ia32_roundpd_az_vec_pack_sfix256", IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX256, UNKNOWN, (int) V8SI_FTYPE_V4DF_V4DF)
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@ -1058,7 +1055,6 @@ BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_roundpd_vec_pack_sfix256, "__builtin
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BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_roundps256, "__builtin_ia32_floorps256", IX86_BUILTIN_FLOORPS256, (enum rtx_code) ROUND_FLOOR, (int) V8SF_FTYPE_V8SF_ROUND)
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BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_roundps256, "__builtin_ia32_ceilps256", IX86_BUILTIN_CEILPS256, (enum rtx_code) ROUND_CEIL, (int) V8SF_FTYPE_V8SF_ROUND)
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BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_roundps256, "__builtin_ia32_truncps256", IX86_BUILTIN_TRUNCPS256, (enum rtx_code) ROUND_TRUNC, (int) V8SF_FTYPE_V8SF_ROUND)
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BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_roundps256, "__builtin_ia32_rintps256", IX86_BUILTIN_RINTPS256, (enum rtx_code) ROUND_MXCSR, (int) V8SF_FTYPE_V8SF_ROUND)
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BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_roundps_sfix256, "__builtin_ia32_floorps_sfix256", IX86_BUILTIN_FLOORPS_SFIX256, (enum rtx_code) ROUND_FLOOR, (int) V8SI_FTYPE_V8SF_ROUND)
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BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_roundps_sfix256, "__builtin_ia32_ceilps_sfix256", IX86_BUILTIN_CEILPS_SFIX256, (enum rtx_code) ROUND_CEIL, (int) V8SI_FTYPE_V8SF_ROUND)
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@ -1661,27 +1661,6 @@ ix86_builtin_vectorized_function (unsigned int fn, tree type_out,
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}
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break;
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CASE_CFN_RINT:
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/* The round insn does not trap on denormals. */
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if (flag_trapping_math || !TARGET_SSE4_1)
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break;
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if (out_mode == DFmode && in_mode == DFmode)
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{
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if (out_n == 2 && in_n == 2)
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return ix86_get_builtin (IX86_BUILTIN_RINTPD);
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else if (out_n == 4 && in_n == 4)
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return ix86_get_builtin (IX86_BUILTIN_RINTPD256);
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}
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if (out_mode == SFmode && in_mode == SFmode)
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{
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if (out_n == 4 && in_n == 4)
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return ix86_get_builtin (IX86_BUILTIN_RINTPS);
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else if (out_n == 8 && in_n == 8)
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return ix86_get_builtin (IX86_BUILTIN_RINTPS256);
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}
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break;
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CASE_CFN_FMA:
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if (out_mode == DFmode && in_mode == DFmode)
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{
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@ -17977,6 +17977,24 @@
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(set_attr "prefix" "orig,orig,vex")
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(set_attr "mode" "TI")])
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(define_expand "nearbyint<mode>2"
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[(set (match_operand:VF 0 "register_operand")
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(unspec:VF
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[(match_operand:VF 1 "vector_operand")
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(match_dup 2)]
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UNSPEC_ROUND))]
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"TARGET_SSE4_1"
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"operands[2] = GEN_INT (ROUND_MXCSR | ROUND_NO_EXC);")
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(define_expand "rint<mode>2"
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[(set (match_operand:VF 0 "register_operand")
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(unspec:VF
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[(match_operand:VF 1 "vector_operand")
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(match_dup 2)]
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UNSPEC_ROUND))]
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"TARGET_SSE4_1"
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"operands[2] = GEN_INT (ROUND_MXCSR);")
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(define_insn "<sse4_1>_round<ssemodesuffix><avxsizesuffix>"
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[(set (match_operand:VF_128_256 0 "register_operand" "=Yr,*x,x")
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(unspec:VF_128_256
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@ -1,3 +1,10 @@
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2019-12-29 Jakub Jelinek <jakub@redhat.com>
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PR target/93078
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* gcc.target/i386/sse4_1-pr93078.c: New test.
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* gcc.target/i386/avx-pr93078.c: New test.
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* gcc.target/i386/avx512f-pr93078.c: New test.
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2019-12-29 Richard Sandiford <richard.sandiford@arm.com>
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* gcc.dg/vect/vect-strided-epilogue-1.c: New test.
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9
gcc/testsuite/gcc.target/i386/avx-pr93078.c
Normal file
9
gcc/testsuite/gcc.target/i386/avx-pr93078.c
Normal file
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@ -0,0 +1,9 @@
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/* PR target/93078 */
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/* { dg-do compile } */
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/* { dg-options "-O2 -ftree-vectorize -mavx -mno-avx2 -mprefer-vector-width=256 -masm=att" } */
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/* { dg-final { scan-assembler "vroundps\[ \t]\+\\\$12,\[^\n\r]*%y" } } */
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/* { dg-final { scan-assembler "vroundps\[ \t]\+\\\$4,\[^\n\r]*%y" } } */
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/* { dg-final { scan-assembler "vroundpd\[ \t]\+\\\$12,\[^\n\r]*%y" } } */
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/* { dg-final { scan-assembler "vroundpd\[ \t]\+\\\$4,\[^\n\r]*%y" } } */
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#include "sse4_1-pr93078.c"
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9
gcc/testsuite/gcc.target/i386/avx512f-pr93078.c
Normal file
9
gcc/testsuite/gcc.target/i386/avx512f-pr93078.c
Normal file
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@ -0,0 +1,9 @@
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/* PR target/93078 */
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/* { dg-do compile } */
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/* { dg-options "-O2 -ftree-vectorize -mavx512f -mprefer-vector-width=512 -masm=att" } */
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/* { dg-final { scan-assembler "vrndscaleps\[ \t]\+\\\$12,\[^\n\r]*%z" } } */
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/* { dg-final { scan-assembler "vrndscaleps\[ \t]\+\\\$4,\[^\n\r]*%z" } } */
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/* { dg-final { scan-assembler "vrndscalepd\[ \t]\+\\\$12,\[^\n\r]*%z" } } */
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/* { dg-final { scan-assembler "vrndscalepd\[ \t]\+\\\$4,\[^\n\r]*%z" } } */
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#include "sse4_1-pr93078.c"
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42
gcc/testsuite/gcc.target/i386/sse4_1-pr93078.c
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42
gcc/testsuite/gcc.target/i386/sse4_1-pr93078.c
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@ -0,0 +1,42 @@
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/* PR target/93078 */
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/* { dg-do compile } */
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/* { dg-options "-O2 -ftree-vectorize -msse4.1 -mno-sse4.2 -masm=att" } */
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/* { dg-final { scan-assembler "roundps\[ \t]\+\\\$12," } } */
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/* { dg-final { scan-assembler "roundps\[ \t]\+\\\$4," } } */
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/* { dg-final { scan-assembler "roundpd\[ \t]\+\\\$12," } } */
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/* { dg-final { scan-assembler "roundpd\[ \t]\+\\\$4," } } */
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float a[16], b[16];
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double c[8], d[8];
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void
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foo (void)
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{
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int i;
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for (i = 0; i < 16; ++i)
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b[i] = __builtin_nearbyintf (a[i]);
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}
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void
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bar (void)
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{
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int i;
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for (i = 0; i < 16; ++i)
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b[i] = __builtin_rintf (a[i]);
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}
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void
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baz (void)
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{
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int i;
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for (i = 0; i < 8; ++i)
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d[i] = __builtin_nearbyint (c[i]);
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}
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void
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qux (void)
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{
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int i;
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for (i = 0; i < 8; ++i)
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d[i] = __builtin_rint (c[i]);
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}
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