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x86: Optimize aes<aeswideklvariant>u8 a bit, fix whitespace

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2020-11-03  Uroš Bizjak  <ubizjak@gmail.com>

gcc/

	* config/i386/sse.md (aes<aeswideklvariant>u8):
	Do not use xmm_regs array.  Fix whitespace.
This commit is contained in:
Uros Bizjak 2020-11-03 09:51:01 +01:00
parent db3f0d218c
commit 682ed7ad23
1 changed files with 35 additions and 32 deletions
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67
gcc/config/i386/sse.md
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@ -23333,10 +23333,10 @@
;; KEYLOCKER
(define_insn "loadiwkey"
[(unspec_volatile:V2DI [(match_operand:V2DI 0 "register_operand" "v")
(match_operand:V2DI 1 "register_operand" "v")
(match_operand:V2DI 2 "register_operand" "Yz")
(match_operand:SI 3 "register_operand" "a")]
UNSPECV_LOADIWKEY)
(match_operand:V2DI 1 "register_operand" "v")
(match_operand:V2DI 2 "register_operand" "Yz")
(match_operand:SI 3 "register_operand" "a")]
UNSPECV_LOADIWKEY)
(clobber (reg:CC FLAGS_REG))]
"TARGET_KL"
"loadiwkey\t{%0, %1|%1, %0}"
@ -23348,7 +23348,7 @@
(unspec_volatile:SI
[(match_operand:SI 1 "register_operand")
(reg:V2DI XMM0_REG)]
UNSPECV_ENCODEKEY128U32))])]
UNSPECV_ENCODEKEY128U32))])]
"TARGET_KL"
{
rtx xmm_regs[7];
@ -23392,7 +23392,7 @@
(unspec_volatile:SI
[(match_operand:SI 1 "register_operand" "r")
(reg:V2DI XMM0_REG)]
UNSPECV_ENCODEKEY128U32))])]
UNSPECV_ENCODEKEY128U32))])]
"TARGET_KL"
"encodekey128\t{%1, %0|%0, %1}"
[(set_attr "type" "other")])
@ -23455,37 +23455,42 @@
"encodekey256\t{%1, %0|%0, %1}"
[(set_attr "type" "other")])
(define_int_iterator AESDECENCKL [UNSPECV_AESDEC128KLU8 UNSPECV_AESDEC256KLU8
UNSPECV_AESENC128KLU8 UNSPECV_AESENC256KLU8])
(define_int_iterator AESDECENCKL
[UNSPECV_AESDEC128KLU8 UNSPECV_AESDEC256KLU8
UNSPECV_AESENC128KLU8 UNSPECV_AESENC256KLU8])
(define_int_attr aesklvariant [(UNSPECV_AESDEC128KLU8 "dec128kl")
(UNSPECV_AESDEC256KLU8 "dec256kl")
(UNSPECV_AESENC128KLU8 "enc128kl")
(UNSPECV_AESENC256KLU8 "enc256kl")])
(define_int_attr aesklvariant
[(UNSPECV_AESDEC128KLU8 "dec128kl")
(UNSPECV_AESDEC256KLU8 "dec256kl")
(UNSPECV_AESENC128KLU8 "enc128kl")
(UNSPECV_AESENC256KLU8 "enc256kl")])
(define_insn "aes<aesklvariant>u8"
[(set (match_operand:V2DI 0 "register_operand" "=v")
(unspec_volatile:V2DI [(match_operand:V2DI 1 "register_operand" "0")
(match_operand:BLK 2 "memory_operand" "m")]
AESDECENCKL))
(unspec_volatile:V2DI [(match_operand:V2DI 1 "register_operand" "0")
(match_operand:BLK 2 "memory_operand" "m")]
AESDECENCKL))
(set (reg:CCZ FLAGS_REG)
(unspec_volatile:CCZ [(match_dup 1) (match_dup 2)] AESDECENCKL))]
(unspec_volatile:CCZ [(match_dup 1) (match_dup 2)] AESDECENCKL))]
"TARGET_KL"
"aes<aesklvariant>\t{%2, %0|%0, %2}"
[(set_attr "type" "other")])
(define_int_iterator AESDECENCWIDEKL [UNSPECV_AESDECWIDE128KLU8 UNSPECV_AESDECWIDE256KLU8
UNSPECV_AESENCWIDE128KLU8 UNSPECV_AESENCWIDE256KLU8])
(define_int_iterator AESDECENCWIDEKL
[UNSPECV_AESDECWIDE128KLU8 UNSPECV_AESDECWIDE256KLU8
UNSPECV_AESENCWIDE128KLU8 UNSPECV_AESENCWIDE256KLU8])
(define_int_attr aeswideklvariant [(UNSPECV_AESDECWIDE128KLU8 "decwide128kl")
(UNSPECV_AESDECWIDE256KLU8 "decwide256kl")
(UNSPECV_AESENCWIDE128KLU8 "encwide128kl")
(UNSPECV_AESENCWIDE256KLU8 "encwide256kl")])
(define_int_attr aeswideklvariant
[(UNSPECV_AESDECWIDE128KLU8 "decwide128kl")
(UNSPECV_AESDECWIDE256KLU8 "decwide256kl")
(UNSPECV_AESENCWIDE128KLU8 "encwide128kl")
(UNSPECV_AESENCWIDE256KLU8 "encwide256kl")])
(define_int_attr AESWIDEKLVARIANT [(UNSPECV_AESDECWIDE128KLU8 "AESDECWIDE128KLU8")
(UNSPECV_AESDECWIDE256KLU8 "AESDECWIDE256KLU8")
(UNSPECV_AESENCWIDE128KLU8 "AESENCWIDE128KLU8")
(UNSPECV_AESENCWIDE256KLU8 "AESENCWIDE256KLU8")])
(define_int_attr AESWIDEKLVARIANT
[(UNSPECV_AESDECWIDE128KLU8 "AESDECWIDE128KLU8")
(UNSPECV_AESDECWIDE256KLU8 "AESDECWIDE256KLU8")
(UNSPECV_AESENCWIDE128KLU8 "AESENCWIDE128KLU8")
(UNSPECV_AESENCWIDE256KLU8 "AESENCWIDE256KLU8")])
(define_expand "aes<aeswideklvariant>u8"
[(match_par_dup 1
@ -23495,16 +23500,12 @@
AESDECENCWIDEKL))])]
"TARGET_WIDEKL"
{
rtx xmm_regs[8];
rtx tmp_unspec;
unsigned i;
/* parallel rtx for widekl predicate */
operands[1] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (9));
for (i = 0; i < 8; i++)
xmm_regs[i] = gen_rtx_REG (V2DImode, GET_SSE_REGNO (i));
tmp_unspec
= gen_rtx_UNSPEC_VOLATILE (CCZmode,
gen_rtvec (1, operands[0]),
@ -23516,12 +23517,14 @@
for (i = 0; i < 8; i++)
{
rtx xmm_reg = gen_rtx_REG (V2DImode, GET_SSE_REGNO (i));
tmp_unspec
= gen_rtx_UNSPEC_VOLATILE (V2DImode,
gen_rtvec (1, xmm_regs[i]),
gen_rtvec (1, xmm_reg),
UNSPECV_<AESWIDEKLVARIANT>);
XVECEXP (operands[1], 0, i + 1)
= gen_rtx_SET (xmm_regs[i], tmp_unspec);
= gen_rtx_SET (xmm_reg, tmp_unspec);
}
})