diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 508ce456bde..462a8d38815 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2011-12-23 Dmitry Plotnikov + + * config/arm/neon.md (float2): New. + (floatuns2): New. + (fix_trunc2): New. + (fix_truncuns2): New. + * config/arm/iterators.md (V_cvtto): New iterator. + 2011-12-23 Richard Guenther PR rtl-optimization/50396 diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index 08874ff0411..15672647e51 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -197,6 +197,10 @@ (define_mode_attr V_CVTTO [(V2SI "V2SF") (V2SF "V2SI") (V4SI "V4SF") (V4SF "V4SI")]) +;; As above but in lower case. +(define_mode_attr V_cvtto [(V2SI "v2sf") (V2SF "v2si") + (V4SI "v4sf") (V4SF "v4si")]) + ;; Define element mode for each vector mode. (define_mode_attr V_elem [(V8QI "QI") (V16QI "QI") (V4HI "HI") (V8HI "HI") diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md index 94e0a5fd08c..d7caa379b85 100644 --- a/gcc/config/arm/neon.md +++ b/gcc/config/arm/neon.md @@ -2932,6 +2932,50 @@ DONE; }) +(define_insn "float2" + [(set (match_operand: 0 "s_register_operand" "=w") + (float: (match_operand:VCVTI 1 "s_register_operand" "w")))] + "TARGET_NEON && !flag_rounding_math" + "vcvt.f32.s32\t%0, %1" + [(set (attr "neon_type") + (if_then_else (match_test "") + (const_string "neon_fp_vadd_ddd_vabs_dd") + (const_string "neon_fp_vadd_qqq_vabs_qq")))] +) + +(define_insn "floatuns2" + [(set (match_operand: 0 "s_register_operand" "=w") + (unsigned_float: (match_operand:VCVTI 1 "s_register_operand" "w")))] + "TARGET_NEON && !flag_rounding_math" + "vcvt.f32.u32\t%0, %1" + [(set (attr "neon_type") + (if_then_else (match_test "") + (const_string "neon_fp_vadd_ddd_vabs_dd") + (const_string "neon_fp_vadd_qqq_vabs_qq")))] +) + +(define_insn "fix_trunc2" + [(set (match_operand: 0 "s_register_operand" "=w") + (fix: (match_operand:VCVTF 1 "s_register_operand" "w")))] + "TARGET_NEON" + "vcvt.s32.f32\t%0, %1" + [(set (attr "neon_type") + (if_then_else (match_test "") + (const_string "neon_fp_vadd_ddd_vabs_dd") + (const_string "neon_fp_vadd_qqq_vabs_qq")))] +) + +(define_insn "fixuns_trunc2" + [(set (match_operand: 0 "s_register_operand" "=w") + (unsigned_fix: (match_operand:VCVTF 1 "s_register_operand" "w")))] + "TARGET_NEON" + "vcvt.u32.f32\t%0, %1" + [(set (attr "neon_type") + (if_then_else (match_test "") + (const_string "neon_fp_vadd_ddd_vabs_dd") + (const_string "neon_fp_vadd_qqq_vabs_qq")))] +) + (define_insn "neon_vcvt" [(set (match_operand: 0 "s_register_operand" "=w") (unspec: [(match_operand:VCVTF 1 "s_register_operand" "w") diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 86ff93e385f..fd1683c76f3 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,17 @@ +2011-12-23 Dmitry Plotnikov + + * gcc.target/arm/vect-vcvt.c: New test. + * gcc.target/arm/vect-vcvtq.c: New test. + + * gcc.dg/vect/fast-math-pr35982.c: Added vect_strided2 alternative + in final check. + + * lib/target-supports.exp (check_effective_target_vect_intfloat_cvt): + True for ARM NEON. + (check_effective_target_vect_uintfloat_cvt): Likewise. + (check_effective_target_vect_floatuint_cvt): Likewise. + (check_effective_target_vect_floatint_cvt): Likewise. + 2011-12-23 Richard Guenther PR rtl-optimization/50396 diff --git a/gcc/testsuite/gcc.dg/vect/fast-math-pr35982.c b/gcc/testsuite/gcc.dg/vect/fast-math-pr35982.c index d8394060bad..0d4c43a7ab5 100644 --- a/gcc/testsuite/gcc.dg/vect/fast-math-pr35982.c +++ b/gcc/testsuite/gcc.dg/vect/fast-math-pr35982.c @@ -20,7 +20,7 @@ float method2_int16 (struct mem *mem) return avg; } -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_extract_even_odd } } } */ -/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { xfail vect_extract_even_odd } } } */ +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_extract_even_odd || vect_strided2 } } } */ +/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { xfail vect_extract_even_odd || vect_strided2 } } } */ /* { dg-final { cleanup-tree-dump "vect" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vect-vcvt.c b/gcc/testsuite/gcc.target/arm/neon/vect-vcvt.c new file mode 100644 index 00000000000..f31d9bfabf9 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon/vect-vcvt.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_neon_ok } */ +/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-details -mvectorize-with-neon-double" } */ +/* { dg-add-options arm_neon } */ + +#define N 32 + +int ib[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45}; +float fa[N]; +int ia[N]; + +int convert() +{ + int i; + + /* int -> float */ + for (i = 0; i < N; i++) + fa[i] = (float) ib[i]; + + /* float -> int */ + for (i = 0; i < N; i++) + ia[i] = (int) fa[i]; + + return 0; +} + +/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */ +/* { dg-final { cleanup-tree-dump "vect" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vect-vcvtq.c b/gcc/testsuite/gcc.target/arm/neon/vect-vcvtq.c new file mode 100644 index 00000000000..f3f01c65e23 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon/vect-vcvtq.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_neon_ok } */ +/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-details" } */ +/* { dg-add-options arm_neon } */ + +#define N 32 + +int ib[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45}; +float fa[N]; +int ia[N]; + +int convert() +{ + int i; + + /* int -> float */ + for (i = 0; i < N; i++) + fa[i] = (float) ib[i]; + + /* float -> int */ + for (i = 0; i < N; i++) + ia[i] = (int) fa[i]; + + return 0; +} + +/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */ +/* { dg-final { cleanup-tree-dump "vect" } } */ diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 1a54043e760..ebf69db66b9 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -1829,7 +1829,9 @@ proc check_effective_target_vect_intfloat_cvt { } { if { [istarget i?86-*-*] || ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) - || [istarget x86_64-*-*] } { + || [istarget x86_64-*-*] + || ([istarget arm*-*-*] + && [check_effective_target_arm_neon_ok])} { set et_vect_intfloat_cvt_saved 1 } } @@ -1865,7 +1867,9 @@ proc check_effective_target_vect_uintfloat_cvt { } { if { [istarget i?86-*-*] || ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) - || [istarget x86_64-*-*] } { + || [istarget x86_64-*-*] + || ([istarget arm*-*-*] + && [check_effective_target_arm_neon_ok])} { set et_vect_uintfloat_cvt_saved 1 } } @@ -1888,7 +1892,9 @@ proc check_effective_target_vect_floatint_cvt { } { if { [istarget i?86-*-*] || ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) - || [istarget x86_64-*-*] } { + || [istarget x86_64-*-*] + || ([istarget arm*-*-*] + && [check_effective_target_arm_neon_ok])} { set et_vect_floatint_cvt_saved 1 } } @@ -1908,7 +1914,9 @@ proc check_effective_target_vect_floatuint_cvt { } { } else { set et_vect_floatuint_cvt_saved 0 if { ([istarget powerpc*-*-*] - && ![istarget powerpc-*-linux*paired*]) } { + && ![istarget powerpc-*-linux*paired*]) + || ([istarget arm*-*-*] + && [check_effective_target_arm_neon_ok])} { set et_vect_floatuint_cvt_saved 1 } }