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re PR target/65103 ([i386] GOTOFF relocation is not propagated into address expression)

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gcc/

	PR target/65103
	* config/i386/i386.c (ix86_address_cost): Fix cost of a PIC
	register.

gcc/testsuite/

	PR target/65103
	* gcc.target/i386/pr65103-1.c: New.

From-SVN: r221380
This commit is contained in:
Ilya Enkovich 2015-03-12 09:53:36 +00:00 • committed by Ilya Enkovich
parent 1b89b8f062
commit 58b387e61f
4 changed files with 47 additions and 21 deletions
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6
gcc/ChangeLog
View file

@ -1,3 +1,9 @@
2015-03-12 Ilya Enkovich <ilya.enkovich@intel.com>
PR target/65103
* config/i386/i386.c (ix86_address_cost): Fix cost of a PIC
register.
2015-03-12 Ilya Enkovich <ilya.enkovich@intel.com>
PR target/65044

38
gcc/config/i386/i386.c
View file

@ -12931,30 +12931,26 @@ ix86_address_cost (rtx x, machine_mode, addr_space_t, bool)
if (parts.index && GET_CODE (parts.index) == SUBREG)
parts.index = SUBREG_REG (parts.index);
/* Attempt to minimize number of registers in the address. */
if ((parts.base
&& (!REG_P (parts.base) || REGNO (parts.base) >= FIRST_PSEUDO_REGISTER))
|| (parts.index
&& (!REG_P (parts.index)
|| REGNO (parts.index) >= FIRST_PSEUDO_REGISTER)))
/* Attempt to minimize number of registers in the address by increasing
address cost for each used register. We don't increase address cost
for "pic_offset_table_rtx". When a memopt with "pic_offset_table_rtx"
is not invariant itself it most likely means that base or index is not
invariant. Therefore only "pic_offset_table_rtx" could be hoisted out,
which is not profitable for x86. */
if (parts.base
&& (!REG_P (parts.base) || REGNO (parts.base) >= FIRST_PSEUDO_REGISTER)
&& (current_pass->type == GIMPLE_PASS
|| !pic_offset_table_rtx
|| !REG_P (parts.base)
|| REGNO (pic_offset_table_rtx) != REGNO (parts.base)))
cost++;
/* When address base or index is "pic_offset_table_rtx" we don't increase
address cost. When a memopt with "pic_offset_table_rtx" is not invariant
itself it most likely means that base or index is not invariant.
Therefore only "pic_offset_table_rtx" could be hoisted out, which is not
profitable for x86. */
if (parts.base
&& (current_pass->type == GIMPLE_PASS
|| (!pic_offset_table_rtx
|| REGNO (pic_offset_table_rtx) != REGNO(parts.base)))
&& (!REG_P (parts.base) || REGNO (parts.base) >= FIRST_PSEUDO_REGISTER)
&& parts.index
&& (current_pass->type == GIMPLE_PASS
|| (!pic_offset_table_rtx
|| REGNO (pic_offset_table_rtx) != REGNO(parts.index)))
if (parts.index
&& (!REG_P (parts.index) || REGNO (parts.index) >= FIRST_PSEUDO_REGISTER)
&& parts.base != parts.index)
&& (current_pass->type == GIMPLE_PASS
|| !pic_offset_table_rtx
|| !REG_P (parts.index)
|| REGNO (pic_offset_table_rtx) != REGNO (parts.index)))
cost++;
/* AMD-K6 don't like addresses with ModR/M set to 00_xxx_100b,

5
gcc/testsuite/ChangeLog
View file

@ -1,3 +1,8 @@
2015-03-12 Ilya Enkovich <ilya.enkovich@intel.com>
PR target/65103
* gcc.target/i386/pr65103-1.c: New.
2015-03-12 Ilya Enkovich <ilya.enkovich@intel.com>
PR target/65044

19
gcc/testsuite/gcc.target/i386/pr65103-1.c Normal file
View file

@ -0,0 +1,19 @@
/* { dg-do compile { target ia32 } } */
/* { dg-require-effective-target pie } */
/* { dg-options "-O2 -fPIE" } */
/* { dg-final { scan-assembler-not "GOTOFF," } } */
typedef struct S
{
int a;
int sum;
int delta;
} S;
S gs;
int global_opt (int max)
{
while (gs.sum < max)
gs.sum += gs.delta;
return gs.a;
}