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PR target/99702: Check RTL type before get value

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gcc/ChangeLog:

	PR target/99702
	* config/riscv/riscv.c (riscv_expand_block_move): Get RTL value
	after type checking.

gcc/testsuite/ChangeLog:

	PR target/99702
	* gcc.target/riscv/pr99702.c: New.
This commit is contained in:
Kito Cheng 2021-03-22 16:32:45 +08:00
parent 0e792ee11a
commit 540dace2ed
2 changed files with 8 additions and 1 deletions
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2
gcc/config/riscv/riscv.c
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@ -3259,9 +3259,9 @@ riscv_block_move_loop (rtx dest, rtx src, unsigned HOST_WIDE_INT length,
bool
riscv_expand_block_move (rtx dest, rtx src, rtx length)
{
unsigned HOST_WIDE_INT hwi_length = UINTVAL (length);
if (CONST_INT_P (length))
{
unsigned HOST_WIDE_INT hwi_length = UINTVAL (length);
unsigned HOST_WIDE_INT factor, align;
align = MIN (MIN (MEM_ALIGN (src), MEM_ALIGN (dest)), BITS_PER_WORD);

7
gcc/testsuite/gcc.target/riscv/pr99702.c Normal file
View file

@ -0,0 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-O" } */
char n;
void *i, *j;
void foo(void) {
__builtin_memcpy(i, j, n);
}