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Patch out nonexistant Altivec instructions on the 360

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This commit is contained in:
Aiden Isik 2025-01-18 19:03:46 +00:00
parent 04696df096
commit 53400733ec
2 changed files with 19 additions and 18 deletions
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36
gcc/config/rs6000/altivec.md
View file

@ -1009,7 +1009,7 @@
(match_operand:VIshort 2 "register_operand" "v")
(match_operand:V4SI 3 "register_operand" "v")]
UNSPEC_VMSUMU))]
"TARGET_ALTIVEC"
"(TARGET_ALTIVEC && 0)"
"vmsumu<VI_char>m %0,%1,%2,%3"
[(set_attr "type" "veccomplex")])
@ -1029,7 +1029,7 @@
(match_operand:VIshort 2 "register_operand" "v")
(match_operand:V4SI 3 "register_operand" "v")]
UNSPEC_VMSUMM))]
"TARGET_ALTIVEC"
"(TARGET_ALTIVEC && 0)"
"vmsumm<VI_char>m %0,%1,%2,%3"
[(set_attr "type" "veccomplex")])
@ -1039,7 +1039,7 @@
(match_operand:V8HI 2 "register_operand" "v")
(match_operand:V4SI 3 "register_operand" "v")]
UNSPEC_VMSUMSHM))]
"TARGET_ALTIVEC"
"(TARGET_ALTIVEC && 0)"
"vmsumshm %0,%1,%2,%3"
[(set_attr "type" "veccomplex")])
@ -1050,7 +1050,7 @@
(match_operand:V4SI 3 "register_operand" "v")]
UNSPEC_VMSUMUHS))
(set (reg:SI VSCR_REGNO) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]
"TARGET_ALTIVEC"
"(TARGET_ALTIVEC && 0)"
"vmsumuhs %0,%1,%2,%3"
[(set_attr "type" "veccomplex")])
@ -1061,7 +1061,7 @@
(match_operand:V4SI 3 "register_operand" "v")]
UNSPEC_VMSUMSHS))
(set (reg:SI VSCR_REGNO) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]
"TARGET_ALTIVEC"
"(TARGET_ALTIVEC && 0)"
"vmsumshs %0,%1,%2,%3"
[(set_attr "type" "veccomplex")])
@ -1122,7 +1122,7 @@
(match_operand:V8HI 3 "register_operand" "v")]
UNSPEC_VMHADDSHS))
(set (reg:SI VSCR_REGNO) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]
"TARGET_ALTIVEC"
"(TARGET_ALTIVEC && 0)"
"vmhaddshs %0,%1,%2,%3"
[(set_attr "type" "veccomplex")])
@ -1133,7 +1133,7 @@
(match_operand:V8HI 3 "register_operand" "v")]
UNSPEC_VMHRADDSHS))
(set (reg:SI VSCR_REGNO) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]
"TARGET_ALTIVEC"
"(TARGET_ALTIVEC && 0)"
"vmhraddshs %0,%1,%2,%3"
[(set_attr "type" "veccomplex")])
@ -1142,7 +1142,7 @@
(plus:V8HI (mult:V8HI (match_operand:V8HI 1 "register_operand" "v")
(match_operand:V8HI 2 "register_operand" "v"))
(match_operand:V8HI 3 "register_operand" "v")))]
"TARGET_ALTIVEC"
"(TARGET_ALTIVEC && 0)"
"vmladduhm %0,%1,%2,%3"
[(set_attr "type" "veccomplex")])
@ -1759,7 +1759,7 @@
(unspec:V8HI [(match_operand:V16QI 1 "register_operand" "v")
(match_operand:V16QI 2 "register_operand" "v")]
UNSPEC_VMULEUB))]
"TARGET_ALTIVEC"
"(TARGET_ALTIVEC && 0)"
"vmuleub %0,%1,%2"
[(set_attr "type" "veccomplex")])
@ -1768,7 +1768,7 @@
(unspec:V8HI [(match_operand:V16QI 1 "register_operand" "v")
(match_operand:V16QI 2 "register_operand" "v")]
UNSPEC_VMULOUB))]
"TARGET_ALTIVEC"
"(TARGET_ALTIVEC && 0)"
"vmuloub %0,%1,%2"
[(set_attr "type" "veccomplex")])
@ -1777,7 +1777,7 @@
(unspec:V8HI [(match_operand:V16QI 1 "register_operand" "v")
(match_operand:V16QI 2 "register_operand" "v")]
UNSPEC_VMULESB))]
"TARGET_ALTIVEC"
"(TARGET_ALTIVEC && 0)"
"vmulesb %0,%1,%2"
[(set_attr "type" "veccomplex")])
@ -1786,7 +1786,7 @@
(unspec:V8HI [(match_operand:V16QI 1 "register_operand" "v")
(match_operand:V16QI 2 "register_operand" "v")]
UNSPEC_VMULOSB))]
"TARGET_ALTIVEC"
"(TARGET_ALTIVEC && 0)"
"vmulosb %0,%1,%2"
[(set_attr "type" "veccomplex")])
@ -1804,7 +1804,7 @@
(unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")
(match_operand:V8HI 2 "register_operand" "v")]
UNSPEC_VMULOUH))]
"TARGET_ALTIVEC"
"(TARGET_ALTIVEC && 0)"
"vmulouh %0,%1,%2"
[(set_attr "type" "veccomplex")])
@ -1822,7 +1822,7 @@
(unspec:V4SI [(match_operand:V8HI 1 "register_operand" "v")
(match_operand:V8HI 2 "register_operand" "v")]
UNSPEC_VMULOSH))]
"TARGET_ALTIVEC"
"(TARGET_ALTIVEC && 0)"
"vmulosh %0,%1,%2"
[(set_attr "type" "veccomplex")])
@ -2183,7 +2183,7 @@
(match_operand:V4SI 2 "register_operand" "v")]
UNSPEC_VSUM4UBS))
(set (reg:SI VSCR_REGNO) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]
"TARGET_ALTIVEC"
"(TARGET_ALTIVEC && 0)"
"vsum4ubs %0,%1,%2"
[(set_attr "type" "veccomplex")])
@ -2193,7 +2193,7 @@
(match_operand:V4SI 2 "register_operand" "v")]
UNSPEC_VSUM4S))
(set (reg:SI VSCR_REGNO) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]
"TARGET_ALTIVEC"
"(TARGET_ALTIVEC && 0)"
"vsum4s<VI_char>s %0,%1,%2"
[(set_attr "type" "veccomplex")])
@ -2226,7 +2226,7 @@
(match_operand:V4SI 2 "register_operand" "v")]
UNSPEC_VSUM2SWS))
(set (reg:SI VSCR_REGNO) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]
"TARGET_ALTIVEC"
"(TARGET_ALTIVEC && 0)"
"vsum2sws %0,%1,%2"
[(set_attr "type" "veccomplex")])
@ -2258,7 +2258,7 @@
(match_operand:V4SI 2 "register_operand" "v")]
UNSPEC_VSUMSWS_DIRECT))
(set (reg:SI VSCR_REGNO) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]
"TARGET_ALTIVEC"
"(TARGET_ALTIVEC && 0)"
"vsumsws %0,%1,%2"
[(set_attr "type" "veccomplex")])

1
libstdc++-v3/configure vendored
View file

@ -11563,6 +11563,7 @@ linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu* | uclinuxfdpiceabi)
finish_cmds='PATH="\$PATH:/sbin" ldconfig -n $libdir'
shlibpath_var=LD_LIBRARY_PATH
shlibpath_overrides_runpath=no
lt_cv_shlibpath_overrides_runpath=no
# Some binutils ld are patched to set DT_RUNPATH
if ${lt_cv_shlibpath_overrides_runpath+:} false; then :