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ia64.md (movsi and movdi patterns): Allow moves from 8-bit constants to AR registers.

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* config/ia64.md (movsi and movdi patterns): Allow moves from
        8-bit constants to AR registers.

From-SVN: r36172
This commit is contained in:
Richard Henderson 2000-09-05 16:20:24 -07:00 • committed by Richard Henderson
parent cf1f6ae31a
commit 514f96e69c
2 changed files with 28 additions and 20 deletions
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5
gcc/ChangeLog
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@ -1,3 +1,8 @@
2000-09-05 Richard Henderson <rth@cygnus.com>
* config/ia64.md (movsi and movdi patterns): Allow moves from
8-bit constants to AR registers.
2000-09-05 Richard Henderson <rth@cygnus.com>
* config/ia64/ia64.md (mulhi3): New.

43
gcc/config/ia64/ia64.md
View file

@ -296,7 +296,7 @@
[(match_operand:CC 3 "register_operand" "c,c,c,c,c,c,c,c")
(const_int 0)])
(set (match_operand:SI 0 "register_operand" "=r,r,r, r,*f,*f, r,*d")
(match_operand:SI 1 "nonmemory_operand" "rO,J,i,*f,rO,*f,*d,rO")))]
(match_operand:SI 1 "nonmemory_operand" "rO,J,i,*f,rO,*f,*d,rK")))]
"TARGET_A_STEP && ia64_move_ok (operands[0], operands[1])"
"@
(%J2) mov %0 = %r1
@ -312,7 +312,7 @@
(define_insn "*movsi_internal_astep"
[(set (match_operand:SI 0 "destination_operand" "=r,r,r,r, m, r,*f,*f, r,*d")
(match_operand:SI 1 "move_operand" "rO,J,i,m,rO,*f,rO,*f,*d,rO"))]
(match_operand:SI 1 "move_operand" "rO,J,i,m,rO,*f,rO,*f,*d,rK"))]
"TARGET_A_STEP && ia64_move_ok (operands[0], operands[1])"
"@
mov %0 = %r1
@ -330,7 +330,7 @@
(define_insn "*movsi_internal"
[(set (match_operand:SI 0 "destination_operand" "=r,r,r,r, m, r,*f,*f, r,*d")
(match_operand:SI 1 "move_operand" "rO,J,i,m,rO,*f,rO,*f,*d,rO"))]
(match_operand:SI 1 "move_operand" "rO,J,i,m,rO,*f,rO,*f,*d,rK"))]
"! TARGET_A_STEP && ia64_move_ok (operands[0], operands[1])"
"@
mov %0 = %r1
@ -380,12 +380,12 @@
(define_insn ""
[(cond_exec
(match_operator 2 "predicate_operator"
[(match_operand:CC 3 "register_operand" "c,c,c,c,c,c,c,c,c,c")
[(match_operand:CC 3 "register_operand" "c,c,c,c,c,c,c,c,c,c,c")
(const_int 0)])
(set (match_operand:DI 0 "register_operand"
"=r,r,r, r,*f,*f, r,*b*e, r,*d")
"=r,r,r, r,*f,*f, r,*b,*e, r,*d")
(match_operand:DI 1 "nonmemory_operand"
"rO,J,i,*f,rO,*f,*b*e, rO,*d,rO")))]
"rO,J,i,*f,rO,*f,*b*e,rO,rK,*d,rK")))]
"TARGET_A_STEP && ia64_move_ok (operands[0], operands[1])"
"*
{
@ -399,7 +399,8 @@
\"(%J2) mov %0 = %1\",
\"(%J2) mov %0 = %r1\",
\"(%J2) mov %0 = %1\",
\"(%J2) mov %0 = %r1\"
\"(%J2) mov %0 = %1\",
\"(%J2) mov %0 = %1\"
};
/* We use 'i' for alternative 2 despite possible PIC problems.
@ -419,7 +420,7 @@
return alt[which_alternative];
}"
[(set_attr "type" "A,A,L,M,M,F,I,I,M,M")
[(set_attr "type" "A,A,L,M,M,F,I,I,I,M,M")
(set_attr "predicable" "no")])
;; This is used during early compilation to delay the decision on
@ -440,9 +441,9 @@
(define_insn "*movdi_internal_astep"
[(set (match_operand:DI 0 "destination_operand"
"=r,r,r,r, m, r,*f,*f,*f, Q, r,*b*e, r,*d, r,*c")
"=r,r,r,r, m, r,*f,*f,*f, Q, r,*b,*e, r,*d, r,*c")
(match_operand:DI 1 "move_operand"
"rO,J,i,m,rO,*f,rO,*f, Q,*f,*b*e, rO,*d,rO,*c,rO"))]
"rO,J,i,m,rO,*f,rO,*f, Q,*f,*b*e,rO,rK,*d,rK,*c,rO"))]
"TARGET_A_STEP && ia64_move_ok (operands[0], operands[1])"
"*
{
@ -460,7 +461,8 @@
\"mov %0 = %1\",
\"mov %0 = %r1\",
\"mov %0 = %1\",
\"mov %0 = %r1\",
\"mov %0 = %1\",
\"mov %0 = %1\",
\"mov %0 = pr\",
\"mov pr = %1, -1\"
};
@ -471,14 +473,14 @@
return alt[which_alternative];
}"
[(set_attr "type" "A,A,L,M,M,M,M,F,M,M,I,I,M,M,I,I")
[(set_attr "type" "A,A,L,M,M,M,M,F,M,M,I,I,I,M,M,I,I")
(set_attr "predicable" "no")])
(define_insn "*movdi_internal"
[(set (match_operand:DI 0 "destination_operand"
"=r,r,r,r, m, r,*f,*f,*f, Q, r,*b*e, r,*d, r,*c")
"=r,r,r,r, m, r,*f,*f,*f, Q, r,*b,*e, r,*d, r,*c")
(match_operand:DI 1 "move_operand"
"rO,J,i,m,rO,*f,rO,*f, Q,*f,*b*e, rO,*d,rO,*c,rO"))]
"rO,J,i,m,rO,*f,rO,*f, Q,*f,*b*e,rO,rK,*d,rK,*c,rO"))]
"! TARGET_A_STEP && ia64_move_ok (operands[0], operands[1])"
"*
{
@ -496,7 +498,8 @@
\"%,mov %0 = %1\",
\"%,mov %0 = %r1\",
\"%,mov %0 = %1\",
\"%,mov %0 = %r1\",
\"%,mov %0 = %1\",
\"%,mov %0 = %1\",
\"mov %0 = pr\",
\"mov pr = %1, -1\"
};
@ -507,7 +510,7 @@
return alt[which_alternative];
}"
[(set_attr "type" "A,A,L,M,M,M,M,F,M,M,I,I,M,M,I,I")])
[(set_attr "type" "A,A,L,M,M,M,M,F,M,M,I,I,I,M,M,I,I")])
(define_split
[(set (match_operand:DI 0 "register_operand" "")
@ -3034,16 +3037,16 @@
(define_insn "*cmovdi_internal"
[(set (match_operand:DI 0 "nonimmediate_operand"
"=r,m,*f,Q,*b*d*e,r,m,*f,Q,*b*d*e,r,m,*f,Q,*b*d*e")
"=r,m,*f,Q,*b,*d*e,r,m,*f,Q,*b,*d*e,r,m,*f,Q,*b,*d*e")
(if_then_else:DI
(match_operator:CC 4 "predicate_operator"
[(match_operand:CC 1 "register_operand"
"c,c,c,c,c,c,c,c,c,c,c,c,c,c,c")
"c,c,c,c,c,c,c,c,c,c,c,c,c,c,c,c,c,c")
(const_int 0)])
(match_operand:DI 2 "general_operand"
"0,0,0,0,0,rim*f*b*d*e,rO,rOQ,*f,r,rim*f*b*d*e,rO,rOQ,*f,r")
"0,0,0,0,0,0,rim*f*b*d*e,rO,rOQ,*f,rO,rK,rim*f*b*d*e,rO,rOQ,*f,rO,rK")
(match_operand:DI 3 "general_operand"
"rim*f*b*d*e,rO,rOQ,*f,r,0,0,0,0,0,rim*f*b*d*e,rO,rOQ,*f,r")))]
"rim*f*b*d*e,rO,rOQ,*f,rO,rK,0,0,0,0,0,0,rim*f*b*d*e,rO,rOQ,*f,rO,rK")))]
"! TARGET_A_STEP"
"* abort ();"
[(set_attr "predicable" "no")])