FreeChainXenon/gcc
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

re PR target/40957 (standard_sse_constant_opcode crash on x86 64)

Browse source 
PR target/40957
	* config/i386/i386.c (standard_sse_mode_p): Remove.
	(standard_sse_constant_p): Return 2 for integer mode
	vector_all_ones_operand when SSE2 is enabled.
	(standard_sse_constant_opcode)<case 2>: Always return [v]pcmpeqd.
	(ix86_expand_vector_move): Do not check for negative values from
	standard_sse_constant_p.

testsuite/ChangeLog:

	PR target/40957
	* gcc.target/i386/pr40957: New test.


Co-Authored-By: H.J. Lu <hongjiu.lu@intel.com>

From-SVN: r150520
This commit is contained in:
Uros Bizjak 2009-08-06 13:43:38 +02:00 • committed by Uros Bizjak
parent e52201b680
commit 4dbf26d534
4 changed files with 53 additions and 43 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

11
gcc/ChangeLog
View file

@ -1,3 +1,14 @@
2009-08-06 Uros Bizjak <ubizjak@gmail.com>
H.J. Lu <hongjiu.lu@intel.com>
PR target/40957
* config/i386/i386.c (standard_sse_mode_p): Remove.
(standard_sse_constant_p): Return 2 for integer mode
vector_all_ones_operand when SSE2 is enabled.
(standard_sse_constant_opcode)<case 2>: Always return [v]pcmpeqd.
(ix86_expand_vector_move): Do not check for negative values from
standard_sse_constant_p.
2009-08-06 Richard Guenther <rguenther@suse.de>
* tree-ssa.c (useless_type_conversion_p_1): Make function and

61
gcc/config/i386/i386.c
View file

@ -7357,28 +7357,8 @@ standard_80387_constant_rtx (int idx)
XFmode);
}
/* Return 1 if mode is a valid mode for sse. */
static int
standard_sse_mode_p (enum machine_mode mode)
{
switch (mode)
{
case V16QImode:
case V8HImode:
case V4SImode:
case V2DImode:
case V4SFmode:
case V2DFmode:
return 1;
default:
return 0;
}
}
/* Return 1 if X is all 0s. For all 1s, return 2 if X is in 128bit
SSE modes and SSE2 is enabled, return 3 if X is in 256bit AVX
modes and AVX is enabled. */
/* Return 1 if X is all 0s and 2 if x is all 1s
in supported SSE vector mode. */
int
standard_sse_constant_p (rtx x)
@ -7388,12 +7368,17 @@ standard_sse_constant_p (rtx x)
if (x == const0_rtx || x == CONST0_RTX (GET_MODE (x)))
return 1;
if (vector_all_ones_operand (x, mode))
{
if (standard_sse_mode_p (mode))
return TARGET_SSE2 ? 2 : -2;
else if (VALID_AVX256_REG_MODE (mode))
return TARGET_AVX ? 3 : -3;
}
switch (mode)
{
case V16QImode:
case V8HImode:
case V4SImode:
case V2DImode:
if (TARGET_SSE2)
return 2;
default:
break;
}
return 0;
}
@ -7422,22 +7407,12 @@ standard_sse_constant_opcode (rtx insn, rtx x)
case MODE_OI:
return "vpxor\t%x0, %x0, %x0";
default:
gcc_unreachable ();
break;
}
case 2:
if (TARGET_AVX)
switch (get_attr_mode (insn))
{
case MODE_V4SF:
case MODE_V2DF:
case MODE_TI:
return "vpcmpeqd\t%0, %0, %0";
break;
default:
gcc_unreachable ();
}
else
return "pcmpeqd\t%0, %0";
return TARGET_AVX ? "vpcmpeqd\t%0, %0, %0" : "pcmpeqd\t%0, %0";
default:
break;
}
gcc_unreachable ();
}
@ -12908,7 +12883,7 @@ ix86_expand_vector_move (enum machine_mode mode, rtx operands[])
&& (CONSTANT_P (op1)
|| (GET_CODE (op1) == SUBREG
&& CONSTANT_P (SUBREG_REG (op1))))
&& standard_sse_constant_p (op1) <= 0)
&& !standard_sse_constant_p (op1))
op1 = validize_mem (force_const_mem (mode, op1));
/* We need to check memory alignment for SSE mode since attribute

6
gcc/testsuite/ChangeLog
View file

@ -1,3 +1,9 @@
2009-08-06 Uros Bizjak <ubizjak@gmail.com>
H.J. Lu <hongjiu.lu@intel.com>
PR target/40957
* gcc.target/i386/pr40957: New test.
2009-08-06 Richard Guenther <rguenther@suse.de>
PR tree-optimization/40964

18
gcc/testsuite/gcc.target/i386/pr40957.c Normal file
View file

@ -0,0 +1,18 @@
/* { dg-do compile } */
/* { dg-require-effective-target avx } */
/* { dg-options "-O2 -mavx" } */
typedef int __v8si __attribute__((__vector_size__(32)));
typedef long long __m256i __attribute__((__vector_size__(32), __may_alias__));
static __m256i
_mm256_set1_epi32 (int __A)
{
return __extension__ (__m256i)(__v8si){ __A, __A, __A, __A,
__A, __A, __A, __A };
}
__m256i
foo ()
{
return _mm256_set1_epi32 (-1);
}