aarch64: Re-parent trailing nondebug base reg uses [PR113089]

While working on PR113089, I realised we where missing code to re-parent
trailing nondebug uses of the base register in the case of cancelling
writeback in the load/store pair pass.  This patch fixes that.

gcc/ChangeLog:

	PR target/113089
	* config/aarch64/aarch64-ldp-fusion.cc (ldp_bb_info::fuse_pair):
	Update trailing nondebug uses of the base register in the case
	of cancelling writeback.
This commit is contained in:
Alex Coplan 2024-01-15 17:13:06 +00:00
parent cef6031694
commit 49bfda6017

View file

@ -1693,6 +1693,30 @@ ldp_bb_info::fuse_pair (bool load_p,
if (trailing_add)
changes.safe_push (make_delete (trailing_add));
else if ((writeback & 2) && !writeback_effect)
{
// The second insn initially had writeback but now the pair does not,
// need to update any nondebug uses of the base register def in the
// second insn. We'll take care of debug uses later.
auto def = find_access (insns[1]->defs (), base_regno);
gcc_assert (def);
auto set = dyn_cast<set_info *> (def);
if (set && set->has_nondebug_uses ())
{
auto orig_use = find_access (insns[0]->uses (), base_regno);
for (auto use : set->nondebug_insn_uses ())
{
auto change = make_change (use->insn ());
change->new_uses = check_remove_regno_access (attempt,
change->new_uses,
base_regno);
change->new_uses = insert_access (attempt,
orig_use,
change->new_uses);
changes.safe_push (change);
}
}
}
auto is_changing = insn_is_changing (changes);
for (unsigned i = 0; i < changes.length (); i++)