arm.md (arm_cmpsi_insn): Compute attr "length".
* config/arm/arm.md (arm_cmpsi_insn): Compute attr "length". (arm_cond_branch): Likewise. (arm_cond_branch_reversed): Likewise. (arm_jump): Likewise. (push_multi): Likewise. * config/arm/constraints.md (Py): New constraint. From-SVN: r172017
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3 changed files with 70 additions and 8 deletions
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@ -1,3 +1,13 @@
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2011-04-06 Wei Guozhi <carrot@google.com>
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PR target/47855
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* config/arm/arm.md (arm_cmpsi_insn): Compute attr "length".
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(arm_cond_branch): Likewise.
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(arm_cond_branch_reversed): Likewise.
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(arm_jump): Likewise.
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(push_multi): Likewise.
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* config/arm/constraints.md (Py): New constraint.
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2011-04-05 Nathan Froyd <froydnj@codesourcery.com>
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PR bootstrap/48471
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@ -7115,13 +7115,17 @@
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(define_insn "*arm_cmpsi_insn"
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[(set (reg:CC CC_REGNUM)
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(compare:CC (match_operand:SI 0 "s_register_operand" "r,r")
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(match_operand:SI 1 "arm_add_operand" "rI,L")))]
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(compare:CC (match_operand:SI 0 "s_register_operand" "l,r,r,r")
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(match_operand:SI 1 "arm_add_operand" "Py,r,rI,L")))]
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"TARGET_32BIT"
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"@
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cmp%?\\t%0, %1
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cmp%?\\t%0, %1
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cmp%?\\t%0, %1
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cmn%?\\t%0, #%n1"
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[(set_attr "conds" "set")]
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[(set_attr "conds" "set")
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(set_attr "arch" "t2,t2,any,any")
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(set_attr "length" "2,2,4,4")]
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)
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(define_insn "*cmpsi_shiftsi"
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@ -7292,7 +7296,14 @@
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return \"b%d1\\t%l0\";
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"
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[(set_attr "conds" "use")
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(set_attr "type" "branch")]
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(set_attr "type" "branch")
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(set (attr "length")
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(if_then_else
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(and (ne (symbol_ref "TARGET_THUMB2") (const_int 0))
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(and (ge (minus (match_dup 0) (pc)) (const_int -250))
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(le (minus (match_dup 0) (pc)) (const_int 256))))
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(const_int 2)
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(const_int 4)))]
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)
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(define_insn "*arm_cond_branch_reversed"
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@ -7311,7 +7322,14 @@
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return \"b%D1\\t%l0\";
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"
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[(set_attr "conds" "use")
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(set_attr "type" "branch")]
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(set_attr "type" "branch")
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(set (attr "length")
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(if_then_else
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(and (ne (symbol_ref "TARGET_THUMB2") (const_int 0))
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(and (ge (minus (match_dup 0) (pc)) (const_int -250))
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(le (minus (match_dup 0) (pc)) (const_int 256))))
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(const_int 2)
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(const_int 4)))]
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)
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@ -7763,7 +7781,14 @@
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return \"b%?\\t%l0\";
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}
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"
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[(set_attr "predicable" "yes")]
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[(set_attr "predicable" "yes")
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(set (attr "length")
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(if_then_else
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(and (ne (symbol_ref "TARGET_THUMB2") (const_int 0))
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(and (ge (minus (match_dup 0) (pc)) (const_int -2044))
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(le (minus (match_dup 0) (pc)) (const_int 2048))))
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(const_int 2)
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(const_int 4)))]
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)
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(define_insn "*thumb_jump"
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@ -10263,7 +10288,29 @@
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return \"\";
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}"
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[(set_attr "type" "store4")]
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[(set_attr "type" "store4")
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(set (attr "length")
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(if_then_else
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(and (ne (symbol_ref "TARGET_THUMB2") (const_int 0))
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(ne (symbol_ref "{
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/* Check if there are any high register (except lr)
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references in the list. KEEP the following iteration
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in sync with the template above. */
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int i, regno, hi_reg;
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int num_saves = XVECLEN (operands[2], 0);
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regno = REGNO (operands[1]);
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hi_reg = (REGNO_REG_CLASS (regno) == HI_REGS)
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&& (regno != LR_REGNUM);
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for (i = 1; i < num_saves && !hi_reg; i++)
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{
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regno = REGNO (XEXP (XVECEXP (operands[2], 0, i), 0));
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hi_reg |= (REGNO_REG_CLASS (regno) == HI_REGS)
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&& (regno != LR_REGNUM);
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}
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!hi_reg; }")
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(const_int 0)))
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(const_int 2)
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(const_int 4)))]
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)
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(define_insn "stack_tie"
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@ -31,7 +31,7 @@
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;; The following multi-letter normal constraints have been used:
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;; in ARM/Thumb-2 state: Da, Db, Dc, Dn, Dl, DL, Dv, Dy, Di, Dz
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;; in Thumb-1 state: Pa, Pb, Pc, Pd
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;; in Thumb-2 state: Ps, Pt, Pu, Pv, Pw, Px
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;; in Thumb-2 state: Ps, Pt, Pu, Pv, Pw, Px, Py
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;; The following memory constraints have been used:
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;; in ARM/Thumb-2 state: Q, Ut, Uv, Uy, Un, Um, Us
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@ -189,6 +189,11 @@
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(and (match_code "const_int")
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(match_test "TARGET_THUMB2 && ival >= -7 && ival <= -1")))
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(define_constraint "Py"
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"@internal In Thumb-2 state a constant in the range 0 to 255"
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(and (match_code "const_int")
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(match_test "TARGET_THUMB2 && ival >= 0 && ival <= 255")))
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(define_constraint "G"
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"In ARM/Thumb-2 state a valid FPA immediate constant."
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(and (match_code "const_double")
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