[arm] Move cpu and architecture option name parsing
This patch has no functional change. The code used for parsing -mcpu, -mtune and -march options is simply moved from arm.c arm-common.c. The list of FPU options is also moved. Subsequent patches will make use of this within the driver. Some small adjustments are needed as a consequence of moving the definitions of the data objects to another object file, in that we no-longer have direct access to the size of the object. * common/config/arm/arm-common.c (arm_initialize_isa): Moved here from config/arm/arm.c. (arm_print_hint_for_cpu_option): Likewise. (arm_print_hint_for_arch_option): Likewise. (arm_parse_cpu_option_name): Likewise. (arm_parse_arch_option_name): Likewise. * config/arm/arm.c (arm_identify_fpu_from_isa): Use the computed number of entries in the all_fpus list. * config/arm/arm-protos.h (all_architectures, all_cores): Declare. (arm_parse_cpu_option_name): Declare. (arm_parse_arch_option_name): Declare. (arm_parse_option_features): Declare. (arm_intialize_isa): Declare. * config/arm/parsecpu.awk (gen_data): Move CPU and architecture data tables to ... (gen_comm_data): ... here. Make definitions non-static. * config/arm/arm-cpu-data.h: Regenerated. * config/arm/arm-cpu-cdata.h: Regenerated. From-SVN: r249287
This commit is contained in:
Richard Earnshaw
Richard Earnshaw
parent
050809ed8a
commit
435d12725b
7 changed files with 2840 additions and 2760 deletions
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@ -1,3 +1,24 @@
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2017-06-16 Richard Earnshaw <rearnsha@arm.com>
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* common/config/arm/arm-common.c (arm_initialize_isa): Moved here from
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config/arm/arm.c.
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(arm_print_hint_for_cpu_option): Likewise.
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(arm_print_hint_for_arch_option): Likewise.
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(arm_parse_cpu_option_name): Likewise.
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(arm_parse_arch_option_name): Likewise.
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* config/arm/arm.c (arm_identify_fpu_from_isa): Use the computed number
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of entries in the all_fpus list.
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* config/arm/arm-protos.h (all_architectures, all_cores): Declare.
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(arm_parse_cpu_option_name): Declare.
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(arm_parse_arch_option_name): Declare.
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(arm_parse_option_features): Declare.
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(arm_intialize_isa): Declare.
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* config/arm/parsecpu.awk (gen_data): Move CPU and architecture
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data tables to ...
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(gen_comm_data): ... here. Make definitions non-static.
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* config/arm/arm-cpu-data.h: Regenerated.
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* config/arm/arm-cpu-cdata.h: Regenerated.
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2017-06-16 Richard Earnshaw <rearnsha@arm.com>
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* config/arm/arm-protos.h (arm_build_target): Remove arch_core.
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@ -27,6 +27,8 @@
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#include "common/common-target-def.h"
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#include "opts.h"
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#include "flags.h"
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#include "sbitmap.h"
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#include "diagnostic.h"
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/* Set default optimization options. */
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static const struct default_options arm_option_optimization_table[] =
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@ -187,6 +189,194 @@ arm_target_thumb_only (int argc, const char **argv)
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return NULL;
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}
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/* List the permitted CPU option names. If TARGET is a near miss for an
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entry, print out the suggested alternative. */
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static void
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arm_print_hint_for_cpu_option (const char *target,
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const cpu_option *list)
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{
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auto_vec<const char*> candidates;
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for (; list->common.name != NULL; list++)
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candidates.safe_push (list->common.name);
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char *s;
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const char *hint = candidates_list_and_hint (target, s, candidates);
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if (hint)
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inform (input_location, "valid arguments are: %s; did you mean %qs?",
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s, hint);
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else
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inform (input_location, "valid arguments are: %s", s);
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XDELETEVEC (s);
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}
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/* Parse the base component of a CPU selection in LIST. Return a
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pointer to the entry in the architecture table. OPTNAME is the
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name of the option we are parsing and can be used if a diagnostic
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is needed. */
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const cpu_option *
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arm_parse_cpu_option_name (const cpu_option *list, const char *optname,
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const char *target)
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{
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const cpu_option *entry;
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const char *end = strchr (target, '+');
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size_t len = end ? end - target : strlen (target);
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for (entry = list; entry->common.name != NULL; entry++)
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{
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if (strncmp (entry->common.name, target, len) == 0
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&& entry->common.name[len] == '\0')
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return entry;
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}
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error_at (input_location, "unrecognized %s target: %s", optname, target);
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arm_print_hint_for_cpu_option (target, list);
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return NULL;
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}
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/* List the permitted architecture option names. If TARGET is a near
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miss for an entry, print out the suggested alternative. */
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static void
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arm_print_hint_for_arch_option (const char *target,
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const arch_option *list)
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{
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auto_vec<const char*> candidates;
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for (; list->common.name != NULL; list++)
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candidates.safe_push (list->common.name);
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char *s;
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const char *hint = candidates_list_and_hint (target, s, candidates);
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if (hint)
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inform (input_location, "valid arguments are: %s; did you mean %qs?",
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s, hint);
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else
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inform (input_location, "valid arguments are: %s", s);
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XDELETEVEC (s);
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}
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/* Parse the base component of a CPU or architecture selection in
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LIST. Return a pointer to the entry in the architecture table.
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OPTNAME is the name of the option we are parsing and can be used if
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a diagnostic is needed. */
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const arch_option *
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arm_parse_arch_option_name (const arch_option *list, const char *optname,
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const char *target)
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{
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const arch_option *entry;
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const char *end = strchr (target, '+');
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size_t len = end ? end - target : strlen (target);
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for (entry = list; entry->common.name != NULL; entry++)
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{
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if (strncmp (entry->common.name, target, len) == 0
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&& entry->common.name[len] == '\0')
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return entry;
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}
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error_at (input_location, "unrecognized %s target: %s", optname, target);
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arm_print_hint_for_arch_option (target, list);
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return NULL;
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}
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/* Convert a static initializer array of feature bits to sbitmap
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representation. */
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void
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arm_initialize_isa (sbitmap isa, const enum isa_feature *isa_bits)
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{
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bitmap_clear (isa);
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while (*isa_bits != isa_nobit)
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bitmap_set_bit (isa, *(isa_bits++));
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}
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/* OPT isn't a recognized feature. Print a suitable error message and
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suggest a possible value. Always print the list of permitted
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values. */
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static void
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arm_unrecognized_feature (const char *opt, size_t len,
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const cpu_arch_option *target)
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{
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char *this_opt = XALLOCAVEC (char, len+1);
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auto_vec<const char*> candidates;
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strncpy (this_opt, opt, len);
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this_opt[len] = 0;
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error_at (input_location, "%qs does not support feature %qs", target->name,
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this_opt);
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for (const cpu_arch_extension *list = target->extensions;
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list->name != NULL;
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list++)
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candidates.safe_push (list->name);
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char *s;
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const char *hint = candidates_list_and_hint (this_opt, s, candidates);
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if (hint)
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inform (input_location, "valid feature names are: %s; did you mean %qs?",
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s, hint);
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else
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inform (input_location, "valid feature names are: %s", s);
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XDELETEVEC (s);
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}
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/* Parse any feature extensions to add to (or remove from) the
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permitted ISA selection. */
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void
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arm_parse_option_features (sbitmap isa, const cpu_arch_option *target,
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const char *opts_in)
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{
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const char *opts = opts_in;
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if (!opts)
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return;
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if (!target->extensions)
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{
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error_at (input_location, "%s does not take any feature options",
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target->name);
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return;
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}
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while (opts)
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{
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gcc_assert (*opts == '+');
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const struct cpu_arch_extension *entry;
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const char *end = strchr (++opts, '+');
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size_t len = end ? end - opts : strlen (opts);
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bool matched = false;
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for (entry = target->extensions;
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!matched && entry->name != NULL;
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entry++)
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{
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if (strncmp (entry->name, opts, len) == 0
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&& entry->name[len] == '\0')
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{
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if (isa)
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{
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const enum isa_feature *f = entry->isa_bits;
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if (entry->remove)
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{
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while (*f != isa_nobit)
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bitmap_clear_bit (isa, *(f++));
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}
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else
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{
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while (*f != isa_nobit)
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bitmap_set_bit (isa, *(f++));
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}
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}
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matched = true;
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}
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}
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if (!matched)
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arm_unrecognized_feature (opts, len, target);
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opts = end;
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}
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}
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#undef ARM_CPU_NAME_LENGTH
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File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
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@ -513,4 +513,16 @@ struct cpu_option
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enum arch_type arch;
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};
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extern const arch_option all_architectures[];
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extern const cpu_option all_cores[];
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const cpu_option *arm_parse_cpu_option_name (const cpu_option *, const char *,
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const char *);
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const arch_option *arm_parse_arch_option_name (const arch_option *,
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const char *, const char *);
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void arm_parse_option_features (sbitmap, const cpu_arch_option *,
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const char *);
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void arm_initialize_isa (sbitmap, const enum isa_feature *);
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#endif /* ! GCC_ARM_PROTOS_H */
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@ -3024,194 +3024,6 @@ arm_option_override_internal (struct gcc_options *opts,
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#endif
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}
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/* Convert a static initializer array of feature bits to sbitmap
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representation. */
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static void
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arm_initialize_isa (sbitmap isa, const enum isa_feature *isa_bits)
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{
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bitmap_clear (isa);
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while (*isa_bits != isa_nobit)
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bitmap_set_bit (isa, *(isa_bits++));
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}
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/* List the permitted CPU option names. If TARGET is a near miss for an
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entry, print out the suggested alternative. */
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static void
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arm_print_hint_for_cpu_option (const char *target,
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const cpu_option *list)
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{
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auto_vec<const char*> candidates;
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for (; list->common.name != NULL; list++)
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candidates.safe_push (list->common.name);
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char *s;
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const char *hint = candidates_list_and_hint (target, s, candidates);
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if (hint)
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inform (input_location, "valid arguments are: %s; did you mean %qs?",
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s, hint);
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else
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inform (input_location, "valid arguments are: %s", s);
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XDELETEVEC (s);
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}
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/* Parse the base component of a CPU selection in LIST. Return a
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pointer to the entry in the architecture table. OPTNAME is the
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name of the option we are parsing and can be used if a diagnostic
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is needed. */
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static const cpu_option *
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arm_parse_cpu_option_name (const cpu_option *list, const char *optname,
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const char *target)
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{
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const cpu_option *entry;
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const char *end = strchr (target, '+');
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size_t len = end ? end - target : strlen (target);
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for (entry = list; entry->common.name != NULL; entry++)
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{
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if (strncmp (entry->common.name, target, len) == 0
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&& entry->common.name[len] == '\0')
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return entry;
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}
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error_at (input_location, "unrecognized %s target: %s", optname, target);
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arm_print_hint_for_cpu_option (target, list);
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return NULL;
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}
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/* List the permitted architecture option names. If TARGET is a near
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miss for an entry, print out the suggested alternative. */
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static void
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arm_print_hint_for_arch_option (const char *target,
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const arch_option *list)
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{
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auto_vec<const char*> candidates;
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for (; list->common.name != NULL; list++)
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candidates.safe_push (list->common.name);
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char *s;
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const char *hint = candidates_list_and_hint (target, s, candidates);
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if (hint)
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inform (input_location, "valid arguments are: %s; did you mean %qs?",
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s, hint);
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else
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inform (input_location, "valid arguments are: %s", s);
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XDELETEVEC (s);
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}
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/* Parse the base component of a CPU or architecture selection in
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LIST. Return a pointer to the entry in the architecture table.
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OPTNAME is the name of the option we are parsing and can be used if
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a diagnostic is needed. */
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static const arch_option *
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arm_parse_arch_option_name (const arch_option *list, const char *optname,
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const char *target)
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{
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const arch_option *entry;
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const char *end = strchr (target, '+');
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size_t len = end ? end - target : strlen (target);
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for (entry = list; entry->common.name != NULL; entry++)
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{
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if (strncmp (entry->common.name, target, len) == 0
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&& entry->common.name[len] == '\0')
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return entry;
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}
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error_at (input_location, "unrecognized %s target: %s", optname, target);
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arm_print_hint_for_arch_option (target, list);
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return NULL;
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}
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/* OPT isn't a recognized feature. Print a suitable error message and
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suggest a possible value. Always print the list of permitted
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values. */
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static void
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arm_unrecognized_feature (const char *opt, size_t len,
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const cpu_arch_option *target)
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{
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char *this_opt = XALLOCAVEC (char, len+1);
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auto_vec<const char*> candidates;
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strncpy (this_opt, opt, len);
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this_opt[len] = 0;
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error_at (input_location, "%qs does not support feature %qs", target->name,
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this_opt);
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for (const cpu_arch_extension *list = target->extensions;
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list->name != NULL;
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list++)
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candidates.safe_push (list->name);
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char *s;
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const char *hint = candidates_list_and_hint (this_opt, s, candidates);
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if (hint)
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inform (input_location, "valid feature names are: %s; did you mean %qs?",
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s, hint);
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else
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inform (input_location, "valid feature names are: %s", s);
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XDELETEVEC (s);
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}
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/* Parse any feature extensions to add to (or remove from) the
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permitted ISA selection. */
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static void
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arm_parse_option_features (sbitmap isa, const cpu_arch_option *target,
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const char *opts_in)
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{
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const char *opts = opts_in;
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if (!opts)
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return;
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if (!target->extensions)
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{
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error_at (input_location, "%s does not take any feature options",
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target->name);
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return;
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}
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while (opts)
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{
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gcc_assert (*opts == '+');
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const struct cpu_arch_extension *entry;
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const char *end = strchr (++opts, '+');
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size_t len = end ? end - opts : strlen (opts);
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bool matched = false;
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for (entry = target->extensions;
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!matched && entry->name != NULL;
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entry++)
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{
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if (strncmp (entry->name, opts, len) == 0
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&& entry->name[len] == '\0')
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{
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if (isa)
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{
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const enum isa_feature *f = entry->isa_bits;
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if (entry->remove)
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{
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while (*f != isa_nobit)
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bitmap_clear_bit (isa, *(f++));
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}
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else
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{
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while (*f != isa_nobit)
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bitmap_set_bit (isa, *(f++));
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}
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}
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matched = true;
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}
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}
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if (!matched)
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arm_unrecognized_feature (opts, len, target);
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opts = end;
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}
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}
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static sbitmap isa_all_fpubits;
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static sbitmap isa_quirkbits;
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@ -30886,7 +30698,7 @@ arm_identify_fpu_from_isa (sbitmap isa)
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if (bitmap_empty_p (fpubits))
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return "softvfp";
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for (unsigned int i = 0; i < ARRAY_SIZE (all_fpus); i++)
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for (unsigned int i = 0; i < TARGET_FPU_auto; i++)
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{
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arm_initialize_isa (cand_fpubits, all_fpus[i].isa_bits);
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if (bitmap_equal_p (fpubits, cand_fpubits))
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@ -128,6 +128,39 @@ function gen_headers () {
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function gen_data () {
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boilerplate("C")
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print "static const cpu_tune all_tunes[] ="
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print "{"
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ncpus = split (cpu_list, cpus)
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|
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for (n = 1; n <= ncpus; n++) {
|
||||
print " { /* " cpus[n] ". */"
|
||||
# scheduler
|
||||
if (cpus[n] in cpu_tune_for) {
|
||||
if (! (cpu_tune_for[cpus[n]] in cpu_cnames)) {
|
||||
fatal("unknown \"tune for\" target " cpu_tune_for[cpus[n]] \
|
||||
" for CPU " cpus[n])
|
||||
}
|
||||
print " TARGET_CPU_" cpu_cnames[cpu_tune_for[cpus[n]]] ","
|
||||
} else {
|
||||
print " TARGET_CPU_" cpu_cnames[cpus[n]] ","
|
||||
}
|
||||
# tune_flags
|
||||
if (cpus[n] in cpu_tune_flags) {
|
||||
print " (" cpu_tune_flags[cpus[n]] "),"
|
||||
} else print " 0,"
|
||||
# tune
|
||||
print " &arm_" cpu_cost[cpus[n]] "_tune"
|
||||
print " },"
|
||||
}
|
||||
print " {TARGET_CPU_arm_none, 0, NULL}"
|
||||
print "};"
|
||||
|
||||
}
|
||||
|
||||
function gen_comm_data () {
|
||||
boilerplate("C")
|
||||
|
||||
ncpus = split (cpu_list, cpus)
|
||||
|
||||
for (n = 1; n <= ncpus; n++) {
|
||||
|
|
@ -147,7 +180,7 @@ function gen_data () {
|
|||
}
|
||||
}
|
||||
|
||||
print "static const cpu_option all_cores[] ="
|
||||
print "const cpu_option all_cores[] ="
|
||||
print "{"
|
||||
|
||||
for (n = 1; n <= ncpus; n++) {
|
||||
|
|
@ -188,32 +221,6 @@ function gen_data () {
|
|||
print " {{NULL, NULL, {isa_nobit}}, TARGET_ARCH_arm_none}"
|
||||
print "};"
|
||||
|
||||
print "static const cpu_tune all_tunes[] ="
|
||||
print "{"
|
||||
|
||||
for (n = 1; n <= ncpus; n++) {
|
||||
print " { /* " cpus[n] ". */"
|
||||
# scheduler
|
||||
if (cpus[n] in cpu_tune_for) {
|
||||
if (! (cpu_tune_for[cpus[n]] in cpu_cnames)) {
|
||||
fatal("unknown \"tune for\" target " cpu_tune_for[cpus[n]] \
|
||||
" for CPU " cpus[n])
|
||||
}
|
||||
print " TARGET_CPU_" cpu_cnames[cpu_tune_for[cpus[n]]] ","
|
||||
} else {
|
||||
print " TARGET_CPU_" cpu_cnames[cpus[n]] ","
|
||||
}
|
||||
# tune_flags
|
||||
if (cpus[n] in cpu_tune_flags) {
|
||||
print " (" cpu_tune_flags[cpus[n]] "),"
|
||||
} else print " 0,"
|
||||
# tune
|
||||
print " &arm_" cpu_cost[cpus[n]] "_tune"
|
||||
print " },"
|
||||
}
|
||||
print " {TARGET_CPU_arm_none, 0, NULL}"
|
||||
print "};"
|
||||
|
||||
narchs = split (arch_list, archs)
|
||||
|
||||
for (n = 1; n <= narchs; n++) {
|
||||
|
|
@ -233,7 +240,7 @@ function gen_data () {
|
|||
}
|
||||
}
|
||||
|
||||
print "static const struct arch_option all_architectures[] ="
|
||||
print "const arch_option all_architectures[] ="
|
||||
print "{"
|
||||
|
||||
for (n = 1; n <= narchs; n++) {
|
||||
|
|
@ -265,7 +272,7 @@ function gen_data () {
|
|||
print " NULL, BASE_ARCH_0, TARGET_CPU_arm_none}"
|
||||
print "};\n"
|
||||
|
||||
print "const struct arm_fpu_desc all_fpus[] ="
|
||||
print "const arm_fpu_desc all_fpus[] ="
|
||||
print "{"
|
||||
|
||||
nfpus = split (fpu_list, fpus)
|
||||
|
|
@ -281,10 +288,6 @@ function gen_data () {
|
|||
}
|
||||
|
||||
print "};"
|
||||
}
|
||||
|
||||
function gen_comm_data () {
|
||||
boilerplate("C")
|
||||
|
||||
print "static const struct arm_arch_core_flag arm_arch_core_flags[] ="
|
||||
print "{"
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue