FreeChainXenon/gcc
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

[PR98722] LRA: Check that target has no 3-op add insn to transform 2 plus expression.

Browse source 
Patch cf2ac1c30a for solving PR97969 was
assumed for targets with absent 3-op add insn.  But the original patch did
not check this.  This patch adds the check.

gcc/ChangeLog:

	PR rtl-optimization/98722
	* lra-eliminations.c (eliminate_regs_in_insn): Check that target
	has no 3-op add insn to transform insns containing two pluses.

gcc/testsuite/ChangeLog:

	PR rtl-optimization/98722
	* g++.target/s390/pr98722.C: New.
This commit is contained in:
Vladimir N. Makarov 2021-01-20 11:40:14 -05:00
parent 261cdd2319
commit 4334b52427
2 changed files with 16 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
gcc/lra-eliminations.c
View file

@ -1057,7 +1057,10 @@ eliminate_regs_in_insn (rtx_insn *insn, bool replace_p, bool first_p,
reg2 = SUBREG_REG (reg2);
if (REG_P (reg1) && REG_P (reg2)
&& REGNO (reg1) < FIRST_PSEUDO_REGISTER
&& REGNO (reg2) >= FIRST_PSEUDO_REGISTER)
&& REGNO (reg2) >= FIRST_PSEUDO_REGISTER
&& GET_MODE (reg1) == Pmode
&& !have_addptr3_insn (gen_reg_rtx (Pmode), reg1,
XEXP (XEXP (SET_SRC (set), 0), 1)))
{
XEXP (XEXP (SET_SRC (set), 0), 0) = op2;
XEXP (SET_SRC (set), 1) = op1;

12
gcc/testsuite/g++.target/s390/pr98722.C Normal file
View file

@ -0,0 +1,12 @@
// { dg-do compile }
// { dg-options "-Og -fno-tree-fre -fno-split-wide-types" }
struct B {
virtual void Method();
};
typedef void (B::*fn_type_a)();
int main() {
fn_type_a f(&B::Method);
B b;
(b.*f)();
}