neon.md (*neon_mov<mode>): Reject two non-register operands.
* config/arm/neon.md (*neon_mov<mode>): Reject two non-register operands. (movti, mov<mode>): Call force_reg on one operand if required. * config/arm/vec-common.md (mov<mode>): Likewise. From-SVN: r154093
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parent
4aef21c85a
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3 changed files with 31 additions and 3 deletions
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@ -1,3 +1,10 @@
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2009-11-11 Daniel Jacobowitz <dan@codesourcery.com>
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* config/arm/neon.md (*neon_mov<mode>): Reject two non-register
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operands.
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(movti, mov<mode>): Call force_reg on one operand if required.
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* config/arm/vec-common.md (mov<mode>): Likewise.
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2009-11-11 Daniel Jacobowitz <dan@codesourcery.com>
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* config/arm/arm.c (arm_override_options): Enable scheduling for
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@ -459,7 +459,9 @@
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"=w,Uv,w, w, ?r,?w,?r,?r, ?Us")
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(match_operand:VD 1 "general_operand"
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" w,w, Dn,Uvi, w, r, r, Usi,r"))]
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"TARGET_NEON"
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"TARGET_NEON
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&& (register_operand (operands[0], <MODE>mode)
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|| register_operand (operands[1], <MODE>mode))"
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{
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if (which_alternative == 2)
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{
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@ -506,7 +508,9 @@
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"=w,Un,w, w, ?r,?w,?r,?r, ?Us")
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(match_operand:VQXMOV 1 "general_operand"
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" w,w, Dn,Uni, w, r, r, Usi, r"))]
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"TARGET_NEON"
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"TARGET_NEON
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&& (register_operand (operands[0], <MODE>mode)
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|| register_operand (operands[1], <MODE>mode))"
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{
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if (which_alternative == 2)
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{
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@ -549,6 +553,11 @@
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(match_operand:TI 1 "general_operand" ""))]
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"TARGET_NEON"
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{
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if (can_create_pseudo_p ())
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{
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if (GET_CODE (operands[0]) != REG)
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operands[1] = force_reg (TImode, operands[1]);
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}
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})
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(define_expand "mov<mode>"
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@ -556,12 +565,19 @@
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(match_operand:VSTRUCT 1 "general_operand" ""))]
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"TARGET_NEON"
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{
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if (can_create_pseudo_p ())
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{
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if (GET_CODE (operands[0]) != REG)
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operands[1] = force_reg (<MODE>mode, operands[1]);
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}
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})
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(define_insn "*neon_mov<mode>"
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[(set (match_operand:VSTRUCT 0 "nonimmediate_operand" "=w,Ut,w")
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(match_operand:VSTRUCT 1 "general_operand" " w,w, Ut"))]
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"TARGET_NEON"
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"TARGET_NEON
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&& (register_operand (operands[0], <MODE>mode)
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|| register_operand (operands[1], <MODE>mode))"
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{
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switch (which_alternative)
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{
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@ -38,6 +38,11 @@
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"TARGET_NEON
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|| (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
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{
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if (can_create_pseudo_p ())
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{
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if (GET_CODE (operands[0]) != REG)
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operands[1] = force_reg (<MODE>mode, operands[1]);
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}
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})
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;; Vector arithmetic. Expanders are blank, then unnamed insns implement
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