Fix 41787
From-SVN: r153498
This commit is contained in:
Michael Meissner
Michael Meissner
parent
cb9c2485b2
commit
3fc841c85d
5 changed files with 123 additions and 9 deletions
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@ -1,3 +1,23 @@
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2009-10-23 Michael Meissner <meissner@linux.vnet.ibm.com>
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PR target/41787
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* config/rs6000/rs6000.c (struct machine_function): Add
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vsx_or_altivec_used_p to record if vector types are used.
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(rs6000_expand_to_rtl_hook): Rename from
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rs6000_alloc_sdmode_stack_slot. If VSX, check to see if there are
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any vector operations, so if there are, we can set VRSAVE to
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non-zero when only floating point vector registers are used.
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(TARGET_EXPAND_TO_RTL_HOOK): Use rs6000_expand_to_rtl_hook.
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(rs6000_check_vector_mode): Inner function to check if vector
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types are used in the code.
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(compute_vrsave_mask): If VSX, make sure VRSAVE is non-zero if
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vector instructions are used.
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* config/rs6000/rs6000.h (HARD_REGNO_CALL_PART_CLOBBERED):
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Indicate that VSX registers which overlap floating point
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registers, can't be used across a call, since the ABI only states
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the scalar part of the register will be saved and restored.
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2009-10-23 Joseph Myers <joseph@codesourcery.com>
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PR c/41673
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@ -130,6 +130,8 @@ typedef struct GTY(()) machine_function
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64-bits wide and is allocated early enough so that the offset
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does not overflow the 16-bit load/store offset field. */
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rtx sdmode_stack_slot;
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/* True if any VSX or ALTIVEC vector type was used. */
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bool vsx_or_altivec_used_p;
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} machine_function;
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/* Target cpu type */
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@ -913,7 +915,7 @@ static void rs6000_elf_encode_section_info (tree, rtx, int)
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ATTRIBUTE_UNUSED;
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#endif
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static bool rs6000_use_blocks_for_constant_p (enum machine_mode, const_rtx);
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static void rs6000_alloc_sdmode_stack_slot (void);
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static void rs6000_expand_to_rtl_hook (void);
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static void rs6000_instantiate_decls (void);
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#if TARGET_XCOFF
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static void rs6000_xcoff_asm_output_anchor (rtx);
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@ -1505,7 +1507,7 @@ static const struct attribute_spec rs6000_attribute_table[] =
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#define TARGET_BUILTIN_RECIPROCAL rs6000_builtin_reciprocal
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#undef TARGET_EXPAND_TO_RTL_HOOK
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#define TARGET_EXPAND_TO_RTL_HOOK rs6000_alloc_sdmode_stack_slot
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#define TARGET_EXPAND_TO_RTL_HOOK rs6000_expand_to_rtl_hook
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#undef TARGET_INSTANTIATE_DECLS
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#define TARGET_INSTANTIATE_DECLS rs6000_instantiate_decls
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@ -13190,6 +13192,38 @@ rs6000_check_sdmode (tree *tp, int *walk_subtrees, void *data ATTRIBUTE_UNUSED)
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return NULL_TREE;
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}
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static tree
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rs6000_check_vector_mode (tree *tp, int *walk_subtrees, void *data ATTRIBUTE_UNUSED)
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{
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/* Don't walk into types. */
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if (*tp == NULL_TREE || *tp == error_mark_node || TYPE_P (*tp))
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{
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*walk_subtrees = 0;
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return NULL_TREE;
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}
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switch (TREE_CODE (*tp))
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{
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case VAR_DECL:
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case PARM_DECL:
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case FIELD_DECL:
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case RESULT_DECL:
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case SSA_NAME:
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case REAL_CST:
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case INDIRECT_REF:
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case ALIGN_INDIRECT_REF:
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case MISALIGNED_INDIRECT_REF:
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case VIEW_CONVERT_EXPR:
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if (VECTOR_MODE_P (TYPE_MODE (TREE_TYPE (*tp))))
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return *tp;
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break;
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default:
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break;
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}
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return NULL_TREE;
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}
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enum reload_reg_type {
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GPR_REGISTER_TYPE,
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VECTOR_REGISTER_TYPE,
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@ -13630,11 +13664,17 @@ rs6000_ira_cover_classes (void)
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return (TARGET_VSX) ? cover_vsx : cover_pre_vsx;
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}
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/* Allocate a 64-bit stack slot to be used for copying SDmode
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values through if this function has any SDmode references. */
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/* Scan the trees looking for certain types.
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Allocate a 64-bit stack slot to be used for copying SDmode values through if
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this function has any SDmode references.
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If VSX, note whether any vector operation was done so we can set VRSAVE to
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non-zero, even if we just use the floating point registers to tell the
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kernel to save the vector registers. */
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static void
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rs6000_alloc_sdmode_stack_slot (void)
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rs6000_expand_to_rtl_hook (void)
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{
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tree t;
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basic_block bb;
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@ -13642,6 +13682,24 @@ rs6000_alloc_sdmode_stack_slot (void)
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gcc_assert (cfun->machine->sdmode_stack_slot == NULL_RTX);
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/* Check for vectors. */
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if (TARGET_VSX)
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{
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FOR_EACH_BB (bb)
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for (gsi = gsi_start_bb (bb); !gsi_end_p (gsi); gsi_next (&gsi))
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{
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if (walk_gimple_op (gsi_stmt (gsi), rs6000_check_vector_mode,
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NULL))
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{
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cfun->machine->vsx_or_altivec_used_p = true;
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goto found_vector;
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}
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}
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found_vector:
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;
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}
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/* Check for SDmode being used. */
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FOR_EACH_BB (bb)
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for (gsi = gsi_start_bb (bb); !gsi_end_p (gsi); gsi_next (&gsi))
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{
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@ -16783,6 +16841,15 @@ compute_vrsave_mask (void)
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if (df_regs_ever_live_p (i))
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mask |= ALTIVEC_REG_BIT (i);
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/* If VSX is used, we might have used a traditional floating point register
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in a vector mode without using any altivec registers. However the VRSAVE
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register does not have room to indicate the floating point registers.
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Modern kernels only look to see if the value is non-zero to determine if
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they need to save the vector registers, so we just set an arbitrary
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value if any vector type was used. */
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if (mask == 0 && TARGET_VSX && cfun->machine->vsx_or_altivec_used_p)
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mask = 0xFFF;
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if (mask == 0)
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return mask;
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@ -1033,10 +1033,12 @@ extern unsigned rs6000_pointer_size;
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#define HARD_REGNO_NREGS(REGNO, MODE) rs6000_hard_regno_nregs[(MODE)][(REGNO)]
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#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) \
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((TARGET_32BIT && TARGET_POWERPC64 \
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&& (GET_MODE_SIZE (MODE) > 4) \
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&& INT_REGNO_P (REGNO)) ? 1 : 0)
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#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) \
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(((TARGET_32BIT && TARGET_POWERPC64 \
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&& (GET_MODE_SIZE (MODE) > 4) \
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&& INT_REGNO_P (REGNO)) ? 1 : 0) \
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|| (TARGET_VSX && FP_REGNO_P (REGNO) \
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&& GET_MODE_SIZE (MODE) > 8))
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#define VSX_VECTOR_MODE(MODE) \
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((MODE) == V4SFmode \
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@ -1,3 +1,8 @@
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2009-10-22 Michael Meissner <meissner@linux.vnet.ibm.com>
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PR target/41787
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* gcc.target/powerpc/vsx-vrsave.c: New file.
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2009-10-23 Joseph Myers <joseph@codesourcery.com>
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PR c/41673
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20
gcc/testsuite/gcc.target/powerpc/vsx-vrsave.c
Normal file
20
gcc/testsuite/gcc.target/powerpc/vsx-vrsave.c
Normal file
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@ -0,0 +1,20 @@
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/* { dg-do compile { target { powerpc*-*-* } } } */
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/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
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/* { dg-require-effective-target powerpc_vsx_ok } */
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/* { dg-options "-O2 -mcpu=power7" } */
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/* { dg-final { scan-assembler-times "mtvrsave" 2 } } */
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/* Check whether VRSAVE is set to non-zero if VSX vector operations were
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used, but it should not be set if there are no vector operations. */
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void
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generates_vrsave (vector double *a, vector double *b, vector double *c)
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{
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*a = *b + *c;
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}
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void
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no_vrsave (double *a, double *b, double *c)
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{
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*a = *b + *c;
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}
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