i386.c (ix86_secondary_reload): New static function.
* config/i386/i386.c (ix86_secondary_reload): New static function. (TARGET_SECONDARY_RELOAD): New define. * config/i386/i386.h (SECONDARY_OUTPUT_RELOAD_CLASS): Remove. * config/i386/i386.md (reload_outqi): Remove. From-SVN: r135499
This commit is contained in:
parent
3571925eb5
commit
371a05751b
4 changed files with 46 additions and 40 deletions
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@ -1,3 +1,10 @@
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2008-05-18 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.c (ix86_secondary_reload): New static function.
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(TARGET_SECONDARY_RELOAD): New define.
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* config/i386/i386.h (SECONDARY_OUTPUT_RELOAD_CLASS): Remove.
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* config/i386/i386.md (reload_outqi): Remove.
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2008-05-18 Xinliang David Li <davidxl@google.com>
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* gcc/tree-ssa-dce.c: Coding style fix.
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@ -14,8 +21,7 @@
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2008-05-17 Kaz Kojima <kkojima@gcc.gnu.org>
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* config/sh/sh.c (sh_output_mi_thunk): Update the use of
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init_flow.
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* config/sh/sh.c (sh_output_mi_thunk): Update the use of init_flow.
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2008-05-17 Eric Botcazou <ebotcazou@adacore.com>
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@ -47,8 +53,7 @@
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2008-05-16 David S. Miller <davem@davemloft.net>
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* config/sparc/linux.h (NO_PROFILE_COUNTERS): Undef before
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overriding.
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* config/sparc/linux.h (NO_PROFILE_COUNTERS): Undef before overriding.
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* config/sparc/linux64.h (NO_PROFILE_COUNTERS): Likewise.
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2008-05-16 Uros Bizjak <ubizjak@gmail.com>
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@ -61,8 +66,7 @@
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* ifcvt.c (dead_or_predicable): Rename
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df_simulate_one_insn_backwards to df_simulate_one_insn.
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* recog.c (peephole2_optimize): Ditto.
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* rtl-factoring.c (collect_pattern_seqs, clear_regs_live_in_seq):
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Ditto.
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* rtl-factoring.c (collect_pattern_seqs, clear_regs_live_in_seq): Ditto.
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* df.h: Rename df_simulate_one_insn_backwards to
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df_simulate_one_insn. and delete df_simulate_one_insn_forwards.
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* df-problems.c (df_simulate_artificial_refs_at_top) Reversed
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@ -99,8 +103,8 @@
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* tree-ssa-sccvn.c (compare_ops, init_scc_vn): Ditto.
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* function.h (cfun.last_stmt_uid): New field.
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* tree-flow-inline.h (set_gimple_stmt_uid, gimple_stmt_uid,
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gimple_stmt_max_uid, set_gimple_stmt_max_uid,
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inc_gimple_stmt_max_uid): New functions.
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gimple_stmt_max_uid, set_gimple_stmt_max_uid, inc_gimple_stmt_max_uid):
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New functions.
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* tree-dfa.c (renumber_gimple_stmt_uids): New function.
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(create_stmt_ann): Initialize the ann->uid field.
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* tree-ssa-pre.c (compute_avail): Encapsulate the stmt_ann->uid
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@ -141,8 +145,7 @@
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MULTILIB_MATCHES, MULTILIB_EXCEPTIONS): Likewise.
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* config/bfin/t-bfin-linux (MULTILIB_OPTIONS, MULTILIB_DIRNAMES,
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MULTILIB_MATCHES, MULTILIB_EXCEPTIONS): Likewise.
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* config/bfin/bfin-protos.h (enum bfin_cpu_type): Add
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BFIN_CPU_UNKNOWN.
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* config/bfin/bfin-protos.h (enum bfin_cpu_type): Add BFIN_CPU_UNKNOWN.
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* config/bfin/elf.h (STARTFILE_SPEC): Use specific CRT for BF561.
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(LIB_SPEC): Use proper linker script for bf561. Error if no mcpu
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option.
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@ -170,8 +173,8 @@
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* cgraph.h (compute_inline_parameters): Made public.
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* tree-pass.h (ipa_opt_pass): Removed function_generate_summary,
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variable_generate_summary, function_write_summary,
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variable_write_summary, variable_read_summary. Added
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generate_summary, write_summary, read_summary.
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variable_write_summary, variable_read_summary. Added generate_summary,
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write_summary, read_summary.
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* cgraphunit.c (cgraph_process_new_functions): Changed call from
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pass_ipa_inline.function_generate_summary, to
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compute_inline_parameters.
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@ -22023,6 +22023,34 @@ ix86_preferred_output_reload_class (rtx x, enum reg_class regclass)
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return regclass;
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}
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static enum reg_class
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ix86_secondary_reload (bool in_p, rtx x, enum reg_class class,
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enum machine_mode mode,
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secondary_reload_info *sri ATTRIBUTE_UNUSED)
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{
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/* QImode spills from non-QI registers require
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intermediate register on 32bit targets. */
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if (!in_p && mode == QImode && class == NON_Q_REGS
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&& !TARGET_64BIT)
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{
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int regno;
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if (REG_P (x))
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regno = REGNO (x);
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else
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regno = -1;
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if (regno >= FIRST_PSEUDO_REGISTER || GET_CODE (x) == SUBREG)
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regno = true_regnum (x);
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/* Return Q_REGS if the operand is in memory. */
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if (regno == -1)
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return Q_REGS;
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}
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return NO_REGS;
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}
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/* If we are copying between general and FP registers, we need a memory
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location. The same is true for SSE and MMX registers.
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@ -25878,6 +25906,9 @@ x86_builtin_vectorization_cost (bool runtime_test)
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#undef TARGET_FUNCTION_VALUE
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#define TARGET_FUNCTION_VALUE ix86_function_value
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#undef TARGET_SECONDARY_RELOAD
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#define TARGET_SECONDARY_RELOAD ix86_secondary_reload
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#undef TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST
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#define TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST x86_builtin_vectorization_cost
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@ -1524,15 +1524,6 @@ enum reg_class
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? mode_for_size (32, GET_MODE_CLASS (MODE), 0) \
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: MODE)
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/* QImode spills from non-QI registers need a scratch. This does not
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happen often -- the only example so far requires an uninitialized
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pseudo. */
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#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT) \
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(((CLASS) == GENERAL_REGS || (CLASS) == LEGACY_REGS \
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|| (CLASS) == INDEX_REGS) && !TARGET_64BIT && (MODE) == QImode \
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? Q_REGS : NO_REGS)
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/* Return the maximum number of consecutive registers
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needed to represent mode MODE in a register of class CLASS. */
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/* On the 80386, this is the size of MODE in words,
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@ -1810,25 +1810,6 @@
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]
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(const_string "QI")))])
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(define_expand "reload_outqi"
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[(parallel [(match_operand:QI 0 "" "=m")
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(match_operand:QI 1 "register_operand" "r")
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(match_operand:QI 2 "register_operand" "=&q")])]
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""
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{
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rtx op0, op1, op2;
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op0 = operands[0]; op1 = operands[1]; op2 = operands[2];
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gcc_assert (!reg_overlap_mentioned_p (op2, op0));
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if (! q_regs_operand (op1, QImode))
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{
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emit_insn (gen_movqi (op2, op1));
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op1 = op2;
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}
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emit_insn (gen_movqi (op0, op1));
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DONE;
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})
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(define_insn "*swapqi_1"
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[(set (match_operand:QI 0 "register_operand" "+r")
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(match_operand:QI 1 "register_operand" "+r"))
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