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rs6000: Compute rop_hash_save_offset for non-Altivec compiles [PR115389]

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We currently only compute the offset for the ROP hash save location in
the stack frame for Altivec compiles.  For non-Altivec compiles when we
emit ROP mitigation instructions, we use a default offset of zero which
corresponds to the backchain save location which will get clobbered on
any call.  The fix is to compute the ROP hash save location for all
compiles.

2024-06-14  Peter Bergner  <bergner@linux.ibm.com>

gcc/
	PR target/115389
	* config/rs6000/rs6000-logue.cc (rs6000_stack_info): Compute
	rop_hash_save_offset for non-Altivec compiles.

gcc/testsuite
	PR target/115389
	* gcc.target/powerpc/pr115389.c: New test.

(cherry picked from commit c70eea0dba5f223d49c80cfb3e80e87b74330aac)
This commit is contained in:
Peter Bergner 2024-06-14 14:36:20 -05:00
parent c33532c597
commit 33ebeb2435
2 changed files with 21 additions and 5 deletions
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9
gcc/config/rs6000/rs6000-logue.cc
View file

@ -817,17 +817,16 @@ rs6000_stack_info (void)
gcc_assert (info->altivec_size == 0
|| info->altivec_save_offset % 16 == 0);
/* Adjust for AltiVec case. */
info->ehrd_offset = info->altivec_save_offset - ehrd_size;
/* Adjust for ROP protection. */
info->rop_hash_save_offset
= info->altivec_save_offset - info->rop_hash_size;
info->ehrd_offset -= info->rop_hash_size;
}
else
info->ehrd_offset = info->gp_save_offset - ehrd_size;
/* Adjust for ROP protection. */
info->rop_hash_save_offset
= info->gp_save_offset - info->rop_hash_size;
info->ehrd_offset = info->rop_hash_save_offset - ehrd_size;
info->ehcr_offset = info->ehrd_offset - ehcr_size;
info->cr_save_offset = reg_size; /* first word when 64-bit. */
info->lr_save_offset = 2*reg_size;

17
gcc/testsuite/gcc.target/powerpc/pr115389.c Normal file
View file

@ -0,0 +1,17 @@
/* PR target/115389 */
/* { dg-do assemble } */
/* { dg-options "-O2 -mdejagnu-cpu=power10 -mrop-protect -mno-vsx -mno-altivec -mabi=no-altivec -save-temps" } */
/* { dg-require-effective-target rop_ok } */
/* Verify we do not emit invalid offsets for our ROP insns. */
extern void foo (void);
long
bar (void)
{
foo ();
return 0;
}
/* { dg-final { scan-assembler-times {\mhashst\M} 1 } } */
/* { dg-final { scan-assembler-times {\mhashchk\M} 1 } } */