re PR target/61578 (Code size increase for ARM thumb compared to 4.8.x when compiling with -Os)
2015-09-01 Vladimir Makarov <vmakarov@redhat.com> PR target/61578 * lra-lives.c (process_bb_lives): Process move pseudos with the same value for copies and preferences * lra-constraints.c (match_reload): Create match reload pseudo with the same value from single dying input pseudo. From-SVN: r227382
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3 changed files with 33 additions and 14 deletions
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@ -1,3 +1,11 @@
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2015-09-01 Vladimir Makarov <vmakarov@redhat.com>
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PR target/61578
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* lra-lives.c (process_bb_lives): Process move pseudos with the
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same value for copies and preferences
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* lra-constraints.c (match_reload): Create match reload pseudo
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with the same value from single dying input pseudo.
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2015-09-01 Ilya Enkovich <enkovich.gnu@gmail.com>
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2015-09-01 Ilya Enkovich <enkovich.gnu@gmail.com>
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PR target/67405
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PR target/67405
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@ -928,10 +928,12 @@ match_reload (signed char out, signed char *ins, enum reg_class goal_class,
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they live in the same place. When we create a pseudo we
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they live in the same place. When we create a pseudo we
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assign value of original pseudo (if any) from which we
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assign value of original pseudo (if any) from which we
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created the new pseudo. If we create the pseudo from the
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created the new pseudo. If we create the pseudo from the
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input pseudo, the new pseudo will no conflict with the input
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input pseudo, the new pseudo will have no conflict with the
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pseudo which is wrong when the input pseudo lives after the
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input pseudo which is wrong when the input pseudo lives after
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insn and as the new pseudo value is changed by the insn
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the insn and as the new pseudo value is changed by the insn
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output. Therefore we create the new pseudo from the output.
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output. Therefore we create the new pseudo from the output
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except the case when we have single matched dying input
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pseudo.
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We cannot reuse the current output register because we might
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We cannot reuse the current output register because we might
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have a situation like "a <- a op b", where the constraints
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have a situation like "a <- a op b", where the constraints
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@ -940,8 +942,12 @@ match_reload (signed char out, signed char *ins, enum reg_class goal_class,
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so that it doesn't clobber the current value of "a". */
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so that it doesn't clobber the current value of "a". */
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new_in_reg = new_out_reg
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new_in_reg = new_out_reg
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= lra_create_new_reg_with_unique_value (outmode, out_rtx,
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= (ins[1] < 0 && REG_P (in_rtx)
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goal_class, "");
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&& (int) REGNO (in_rtx) < lra_new_regno_start
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&& find_regno_note (curr_insn, REG_DEAD, REGNO (in_rtx))
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? lra_create_new_reg (inmode, in_rtx, goal_class, "")
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: lra_create_new_reg_with_unique_value (outmode, out_rtx,
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goal_class, ""));
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}
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}
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/* In operand can be got from transformations before processing insn
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/* In operand can be got from transformations before processing insn
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constraints. One example of such transformations is subreg
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constraints. One example of such transformations is subreg
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@ -726,28 +726,33 @@ process_bb_lives (basic_block bb, int &curr_point, bool dead_insn_p)
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lra_hard_reg_usage[reg->regno] += freq;
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lra_hard_reg_usage[reg->regno] += freq;
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call_p = CALL_P (curr_insn);
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call_p = CALL_P (curr_insn);
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src_regno = (set != NULL_RTX && REG_P (SET_SRC (set))
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? REGNO (SET_SRC (set)) : -1);
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dst_regno = (set != NULL_RTX && REG_P (SET_DEST (set))
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? REGNO (SET_DEST (set)) : -1);
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if (complete_info_p
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if (complete_info_p
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&& set != NULL_RTX
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&& src_regno >= 0 && dst_regno >= 0
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&& REG_P (SET_DEST (set)) && REG_P (SET_SRC (set))
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/* Check that source regno does not conflict with
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/* Check that source regno does not conflict with
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destination regno to exclude most impossible
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destination regno to exclude most impossible
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preferences. */
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preferences. */
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&& ((((src_regno = REGNO (SET_SRC (set))) >= FIRST_PSEUDO_REGISTER
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&& (((src_regno >= FIRST_PSEUDO_REGISTER
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&& ! sparseset_bit_p (pseudos_live, src_regno))
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&& (! sparseset_bit_p (pseudos_live, src_regno)
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|| (dst_regno >= FIRST_PSEUDO_REGISTER
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&& lra_reg_val_equal_p (src_regno,
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lra_reg_info[dst_regno].val,
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lra_reg_info[dst_regno].offset))))
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|| (src_regno < FIRST_PSEUDO_REGISTER
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|| (src_regno < FIRST_PSEUDO_REGISTER
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&& ! TEST_HARD_REG_BIT (hard_regs_live, src_regno)))
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&& ! TEST_HARD_REG_BIT (hard_regs_live, src_regno)))
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/* It might be 'inheritance pseudo <- reload pseudo'. */
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/* It might be 'inheritance pseudo <- reload pseudo'. */
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|| (src_regno >= lra_constraint_new_regno_start
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|| (src_regno >= lra_constraint_new_regno_start
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&& ((int) REGNO (SET_DEST (set))
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&& dst_regno >= lra_constraint_new_regno_start
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>= lra_constraint_new_regno_start)
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/* Remember to skip special cases where src/dest regnos are
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/* Remember to skip special cases where src/dest regnos are
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the same, e.g. insn SET pattern has matching constraints
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the same, e.g. insn SET pattern has matching constraints
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like =r,0. */
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like =r,0. */
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&& src_regno != (int) REGNO (SET_DEST (set)))))
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&& src_regno != dst_regno)))
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{
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{
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int hard_regno = -1, regno = -1;
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int hard_regno = -1, regno = -1;
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dst_regno = REGNO (SET_DEST (set));
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if (dst_regno >= lra_constraint_new_regno_start
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if (dst_regno >= lra_constraint_new_regno_start
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&& src_regno >= lra_constraint_new_regno_start)
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&& src_regno >= lra_constraint_new_regno_start)
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{
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{
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