Revert "RISC-V:Add float16 tuple type abi"
This reverts commit f9ab5d62c9 due to the
bootstrap failure on machine mode out of range memory access.
Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:
* config/riscv/vector.md: Revert.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/abi-10.c: Revert.
* gcc.target/riscv/rvv/base/abi-11.c: Ditto.
* gcc.target/riscv/rvv/base/abi-12.c: Ditto.
* gcc.target/riscv/rvv/base/abi-15.c: Ditto.
* gcc.target/riscv/rvv/base/abi-8.c: Ditto.
* gcc.target/riscv/rvv/base/abi-9.c: Ditto.
* gcc.target/riscv/rvv/base/abi-17.c: Ditto.
* gcc.target/riscv/rvv/base/abi-18.c: Ditto.
This commit is contained in:
Pan Li
parent
ae10eb041d
commit
319e6fe960
9 changed files with 17 additions and 630 deletions
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@ -98,12 +98,7 @@
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VNx2x8HI,VNx3x8HI,VNx4x8HI,VNx5x8HI,VNx6x8HI,VNx7x8HI,VNx8x8HI,\
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VNx2x4HI,VNx3x4HI,VNx4x4HI,VNx5x4HI,VNx6x4HI,VNx7x4HI,VNx8x4HI,\
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VNx2x2HI,VNx3x2HI,VNx4x2HI,VNx5x2HI,VNx6x2HI,VNx7x2HI,VNx8x2HI,\
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VNx2x1HI,VNx3x1HI,VNx4x1HI,VNx5x1HI,VNx6x1HI,VNx7x1HI,VNx8x1HI,\
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VNx2x32HF,VNx2x16HF,VNx3x16HF,VNx4x16HF,\
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VNx2x8HF,VNx3x8HF,VNx4x8HF,VNx5x8HF,VNx6x8HF,VNx7x8HF,VNx8x8HF,\
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VNx2x4HF,VNx3x4HF,VNx4x4HF,VNx5x4HF,VNx6x4HF,VNx7x4HF,VNx8x4HF,\
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VNx2x2HF,VNx3x2HF,VNx4x2HF,VNx5x2HF,VNx6x2HF,VNx7x2HF,VNx8x2HF,\
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VNx2x1HF,VNx3x1HF,VNx4x1HF,VNx5x1HF,VNx6x1HF,VNx7x1HF,VNx8x1HF")
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VNx2x1HI,VNx3x1HI,VNx4x1HI,VNx5x1HI,VNx6x1HI,VNx7x1HI,VNx8x1HI")
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(const_int 16)
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(eq_attr "mode" "VNx1SI,VNx2SI,VNx4SI,VNx8SI,VNx16SI,VNx32SI,\
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VNx1SF,VNx2SF,VNx4SF,VNx8SF,VNx16SF,VNx32SF,\
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@ -161,17 +156,17 @@
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(symbol_ref "riscv_vector::get_vlmul(E_VNx64HImode)")
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; Half float point
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(eq_attr "mode" "VNx1HF,VNx2x1HF,VNx3x1HF,VNx4x1HF,VNx5x1HF,VNx6x1HF,VNx7x1HF,VNx8x1HF")
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(eq_attr "mode" "VNx1HF")
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(symbol_ref "riscv_vector::get_vlmul(E_VNx1HFmode)")
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(eq_attr "mode" "VNx2HF,VNx2x2HF,VNx3x2HF,VNx4x2HF,VNx5x2HF,VNx6x2HF,VNx7x2HF,VNx8x2HF")
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(eq_attr "mode" "VNx2HF")
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(symbol_ref "riscv_vector::get_vlmul(E_VNx2HFmode)")
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(eq_attr "mode" "VNx4HF,VNx2x4HF,VNx3x4HF,VNx4x4HF,VNx5x4HF,VNx6x4HF,VNx7x4HF,VNx8x4HF")
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(eq_attr "mode" "VNx4HF")
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(symbol_ref "riscv_vector::get_vlmul(E_VNx4HFmode)")
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(eq_attr "mode" "VNx8HF,VNx2x8HF,VNx3x8HF,VNx4x8HF,VNx5x8HF,VNx6x8HF,VNx7x8HF,VNx8x8HF")
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(eq_attr "mode" "VNx8HF")
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(symbol_ref "riscv_vector::get_vlmul(E_VNx8HFmode)")
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(eq_attr "mode" "VNx16HF,VNx2x16HF,VNx3x16HF,VNx4x16HF")
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(eq_attr "mode" "VNx16HF")
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(symbol_ref "riscv_vector::get_vlmul(E_VNx16HFmode)")
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(eq_attr "mode" "VNx32HF,VNx2x32HF")
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(eq_attr "mode" "VNx32HF")
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(symbol_ref "riscv_vector::get_vlmul(E_VNx32HFmode)")
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(eq_attr "mode" "VNx64HF")
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(symbol_ref "riscv_vector::get_vlmul(E_VNx64HFmode)")
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@ -254,17 +249,17 @@
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(symbol_ref "riscv_vector::get_ratio(E_VNx64HImode)")
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; Half float point.
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(eq_attr "mode" "VNx1HF,VNx2x1HF,VNx3x1HF,VNx4x1HF,VNx5x1HF,VNx6x1HF,VNx7x1HF,VNx8x1HF")
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(eq_attr "mode" "VNx1HF")
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(symbol_ref "riscv_vector::get_ratio(E_VNx1HFmode)")
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(eq_attr "mode" "VNx2HF,VNx2x2HF,VNx3x2HF,VNx4x2HF,VNx5x2HF,VNx6x2HF,VNx7x2HF,VNx8x2HF")
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(eq_attr "mode" "VNx2HF")
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(symbol_ref "riscv_vector::get_ratio(E_VNx2HFmode)")
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(eq_attr "mode" "VNx4HF,VNx2x4HF,VNx3x4HF,VNx4x4HF,VNx5x4HF,VNx6x4HF,VNx7x4HF,VNx8x4HF")
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(eq_attr "mode" "VNx4HF")
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(symbol_ref "riscv_vector::get_ratio(E_VNx4HFmode)")
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(eq_attr "mode" "VNx8HF,VNx2x8HF,VNx3x8HF,VNx4x8HF,VNx5x8HF,VNx6x8HF,VNx7x8HF,VNx8x8HF")
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(eq_attr "mode" "VNx8HF")
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(symbol_ref "riscv_vector::get_ratio(E_VNx8HFmode)")
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(eq_attr "mode" "VNx16HF,VNx2x16HF,VNx3x16HF,VNx4x16HF")
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(eq_attr "mode" "VNx16HF")
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(symbol_ref "riscv_vector::get_ratio(E_VNx16HFmode)")
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(eq_attr "mode" "VNx32HF,VNx2x32HF")
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(eq_attr "mode" "VNx32HF")
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(symbol_ref "riscv_vector::get_ratio(E_VNx32HFmode)")
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(eq_attr "mode" "VNx64HF")
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(symbol_ref "riscv_vector::get_ratio(E_VNx64HFmode)")
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@ -173,31 +173,6 @@ void f___rvv_int64m2x4_t () {__rvv_int64m2x4_t t;}
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void f___rvv_uint64m2x4_t () {__rvv_uint64m2x4_t t;}
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void f___rvv_int64m4x2_t () {__rvv_int64m4x2_t t;}
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void f___rvv_uint64m4x2_t () {__rvv_uint64m4x2_t t;}
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void f___rvv_float16mf4x2_t () {__rvv_float16mf4x2_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x2_t'} } */
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void f___rvv_float16mf4x3_t () {__rvv_float16mf4x3_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x3_t'} } */
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void f___rvv_float16mf4x4_t () {__rvv_float16mf4x4_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x4_t'} } */
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void f___rvv_float16mf4x5_t () {__rvv_float16mf4x5_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x5_t'} } */
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void f___rvv_float16mf4x6_t () {__rvv_float16mf4x6_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x6_t'} } */
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void f___rvv_float16mf4x7_t () {__rvv_float16mf4x7_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x7_t'} } */
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void f___rvv_float16mf4x8_t () {__rvv_float16mf4x8_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x8_t'} } */
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void f___rvv_float16mf2x2_t () {__rvv_float16mf2x2_t t;} /* { dg-error {unknown type name '__rvv_float16mf2x2_t'} } */
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void f___rvv_float16mf2x3_t () {__rvv_float16mf2x3_t t;} /* { dg-error {unknown type name '__rvv_float16mf2x3_t'} } */
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void f___rvv_float16mf2x4_t () {__rvv_float16mf2x4_t t;} /* { dg-error {unknown type name '__rvv_float16mf2x4_t'} } */
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void f___rvv_float16mf2x5_t () {__rvv_float16mf2x5_t t;} /* { dg-error {unknown type name '__rvv_float16mf2x5_t'} } */
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void f___rvv_float16mf2x6_t () {__rvv_float16mf2x6_t t;} /* { dg-error {unknown type name '__rvv_float16mf2x6_t'} } */
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void f___rvv_float16mf2x7_t () {__rvv_float16mf2x7_t t;} /* { dg-error {unknown type name '__rvv_float16mf2x7_t'} } */
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void f___rvv_float16mf2x8_t () {__rvv_float16mf2x8_t t;} /* { dg-error {unknown type name '__rvv_float16mf2x8_t'} } */
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void f___rvv_float16m1x2_t () {__rvv_float16m1x2_t t;} /* { dg-error {unknown type name '__rvv_float16m1x2_t'} } */
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void f___rvv_float16m1x3_t () {__rvv_float16m1x3_t t;} /* { dg-error {unknown type name '__rvv_float16m1x3_t'} } */
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void f___rvv_float16m1x4_t () {__rvv_float16m1x4_t t;} /* { dg-error {unknown type name '__rvv_float16m1x4_t'} } */
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void f___rvv_float16m1x5_t () {__rvv_float16m1x5_t t;} /* { dg-error {unknown type name '__rvv_float16m1x5_t'} } */
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void f___rvv_float16m1x6_t () {__rvv_float16m1x6_t t;} /* { dg-error {unknown type name '__rvv_float16m1x6_t'} } */
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void f___rvv_float16m1x7_t () {__rvv_float16m1x7_t t;} /* { dg-error {unknown type name '__rvv_float16m1x7_t'} } */
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void f___rvv_float16m1x8_t () {__rvv_float16m1x8_t t;} /* { dg-error {unknown type name '__rvv_float16m1x8_t'} } */
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void f___rvv_float16m2x2_t () {__rvv_float16m2x2_t t;} /* { dg-error {unknown type name '__rvv_float16m2x2_t'} } */
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void f___rvv_float16m2x3_t () {__rvv_float16m2x3_t t;} /* { dg-error {unknown type name '__rvv_float16m2x3_t'} } */
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void f___rvv_float16m2x4_t () {__rvv_float16m2x4_t t;} /* { dg-error {unknown type name '__rvv_float16m2x4_t'} } */
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void f___rvv_float16m4x2_t () {__rvv_float16m4x2_t t;} /* { dg-error {unknown type name '__rvv_float16m4x2_t'} } */
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void f___rvv_float32mf2x2_t () {__rvv_float32mf2x2_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x2_t'} } */
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void f___rvv_float32mf2x3_t () {__rvv_float32mf2x3_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x3_t'} } */
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void f___rvv_float32mf2x4_t () {__rvv_float32mf2x4_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x4_t'} } */
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@ -1,5 +1,5 @@
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/* { dg-do compile } */
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/* { dg-options "-O3 -march=rv32gc_zve64f_zvfhmin -mabi=ilp32d" } */
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/* { dg-options "-O3 -march=rv32gc_zve64f -mabi=ilp32d" } */
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void f___rvv_int8mf8x2_t () {__rvv_int8mf8x2_t t;}
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void f___rvv_uint8mf8x2_t () {__rvv_uint8mf8x2_t t;}
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@ -173,31 +173,6 @@ void f___rvv_int64m2x4_t () {__rvv_int64m2x4_t t;}
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void f___rvv_uint64m2x4_t () {__rvv_uint64m2x4_t t;}
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void f___rvv_int64m4x2_t () {__rvv_int64m4x2_t t;}
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void f___rvv_uint64m4x2_t () {__rvv_uint64m4x2_t t;}
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void f___rvv_float16mf4x2_t () {__rvv_float16mf4x2_t t;}
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void f___rvv_float16mf4x3_t () {__rvv_float16mf4x3_t t;}
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void f___rvv_float16mf4x4_t () {__rvv_float16mf4x4_t t;}
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void f___rvv_float16mf4x5_t () {__rvv_float16mf4x5_t t;}
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void f___rvv_float16mf4x6_t () {__rvv_float16mf4x6_t t;}
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void f___rvv_float16mf4x7_t () {__rvv_float16mf4x7_t t;}
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void f___rvv_float16mf4x8_t () {__rvv_float16mf4x8_t t;}
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void f___rvv_float16mf2x2_t () {__rvv_float16mf2x2_t t;}
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void f___rvv_float16mf2x3_t () {__rvv_float16mf2x3_t t;}
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void f___rvv_float16mf2x4_t () {__rvv_float16mf2x4_t t;}
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void f___rvv_float16mf2x5_t () {__rvv_float16mf2x5_t t;}
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void f___rvv_float16mf2x6_t () {__rvv_float16mf2x6_t t;}
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void f___rvv_float16mf2x7_t () {__rvv_float16mf2x7_t t;}
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void f___rvv_float16mf2x8_t () {__rvv_float16mf2x8_t t;}
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void f___rvv_float16m1x2_t () {__rvv_float16m1x2_t t;}
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void f___rvv_float16m1x3_t () {__rvv_float16m1x3_t t;}
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void f___rvv_float16m1x4_t () {__rvv_float16m1x4_t t;}
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void f___rvv_float16m1x5_t () {__rvv_float16m1x5_t t;}
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void f___rvv_float16m1x6_t () {__rvv_float16m1x6_t t;}
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void f___rvv_float16m1x7_t () {__rvv_float16m1x7_t t;}
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void f___rvv_float16m1x8_t () {__rvv_float16m1x8_t t;}
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void f___rvv_float16m2x2_t () {__rvv_float16m2x2_t t;}
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void f___rvv_float16m2x3_t () {__rvv_float16m2x3_t t;}
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void f___rvv_float16m2x4_t () {__rvv_float16m2x4_t t;}
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void f___rvv_float16m4x2_t () {__rvv_float16m4x2_t t;}
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void f___rvv_float32mf2x2_t () {__rvv_float32mf2x2_t t;}
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void f___rvv_float32mf2x3_t () {__rvv_float32mf2x3_t t;}
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void f___rvv_float32mf2x4_t () {__rvv_float32mf2x4_t t;}
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/* { dg-do compile } */
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/* { dg-options "-O3 -march=rv32gc_zve64d_zvfhmin -mabi=ilp32d" } */
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/* { dg-options "-O3 -march=rv32gc_zve64d -mabi=ilp32d" } */
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void f___rvv_int8mf8x2_t () {__rvv_int8mf8x2_t t;}
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void f___rvv_uint8mf8x2_t () {__rvv_uint8mf8x2_t t;}
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@ -173,31 +173,6 @@ void f___rvv_int64m2x4_t () {__rvv_int64m2x4_t t;}
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void f___rvv_uint64m2x4_t () {__rvv_uint64m2x4_t t;}
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void f___rvv_int64m4x2_t () {__rvv_int64m4x2_t t;}
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void f___rvv_uint64m4x2_t () {__rvv_uint64m4x2_t t;}
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void f___rvv_float16mf4x2_t () {__rvv_float16mf4x2_t t;}
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void f___rvv_float16mf4x3_t () {__rvv_float16mf4x3_t t;}
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void f___rvv_float16mf4x4_t () {__rvv_float16mf4x4_t t;}
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void f___rvv_float16mf4x5_t () {__rvv_float16mf4x5_t t;}
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void f___rvv_float16mf4x6_t () {__rvv_float16mf4x6_t t;}
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void f___rvv_float16mf4x7_t () {__rvv_float16mf4x7_t t;}
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void f___rvv_float16mf4x8_t () {__rvv_float16mf4x8_t t;}
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void f___rvv_float16mf2x2_t () {__rvv_float16mf2x2_t t;}
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void f___rvv_float16mf2x3_t () {__rvv_float16mf2x3_t t;}
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void f___rvv_float16mf2x4_t () {__rvv_float16mf2x4_t t;}
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void f___rvv_float16mf2x5_t () {__rvv_float16mf2x5_t t;}
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void f___rvv_float16mf2x6_t () {__rvv_float16mf2x6_t t;}
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void f___rvv_float16mf2x7_t () {__rvv_float16mf2x7_t t;}
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void f___rvv_float16mf2x8_t () {__rvv_float16mf2x8_t t;}
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void f___rvv_float16m1x2_t () {__rvv_float16m1x2_t t;}
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void f___rvv_float16m1x3_t () {__rvv_float16m1x3_t t;}
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void f___rvv_float16m1x4_t () {__rvv_float16m1x4_t t;}
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void f___rvv_float16m1x5_t () {__rvv_float16m1x5_t t;}
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void f___rvv_float16m1x6_t () {__rvv_float16m1x6_t t;}
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void f___rvv_float16m1x7_t () {__rvv_float16m1x7_t t;}
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void f___rvv_float16m1x8_t () {__rvv_float16m1x8_t t;}
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void f___rvv_float16m2x2_t () {__rvv_float16m2x2_t t;}
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void f___rvv_float16m2x3_t () {__rvv_float16m2x3_t t;}
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void f___rvv_float16m2x4_t () {__rvv_float16m2x4_t t;}
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void f___rvv_float16m4x2_t () {__rvv_float16m4x2_t t;}
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void f___rvv_float32mf2x2_t () {__rvv_float32mf2x2_t t;}
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void f___rvv_float32mf2x3_t () {__rvv_float32mf2x3_t t;}
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void f___rvv_float32mf2x4_t () {__rvv_float32mf2x4_t t;}
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/* { dg-do compile } */
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/* { dg-options "-O3 -march=rv32gc_zve32f_zvfhmin -mabi=ilp32d" } */
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/* { dg-options "-O3 -march=rv32gc_zve32f -mabi=ilp32d" } */
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void f___rvv_int8mf8x2_t () {__rvv_int8mf8x2_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x2_t'} } */
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void f___rvv_uint8mf8x2_t () {__rvv_uint8mf8x2_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x2_t'} } */
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@ -173,31 +173,6 @@ void f___rvv_int64m2x4_t () {__rvv_int64m2x4_t t;} /* { dg-error {unknown type n
|
|||
void f___rvv_uint64m2x4_t () {__rvv_uint64m2x4_t t;} /* { dg-error {unknown type name '__rvv_uint64m2x4_t'} } */
|
||||
void f___rvv_int64m4x2_t () {__rvv_int64m4x2_t t;} /* { dg-error {unknown type name '__rvv_int64m4x2_t'} } */
|
||||
void f___rvv_uint64m4x2_t () {__rvv_uint64m4x2_t t;} /* { dg-error {unknown type name '__rvv_uint64m4x2_t'} } */
|
||||
void f___rvv_float16mf4x2_t () {__rvv_float16mf4x2_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x2_t'} } */
|
||||
void f___rvv_float16mf4x3_t () {__rvv_float16mf4x3_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x3_t'} } */
|
||||
void f___rvv_float16mf4x4_t () {__rvv_float16mf4x4_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x4_t'} } */
|
||||
void f___rvv_float16mf4x5_t () {__rvv_float16mf4x5_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x5_t'} } */
|
||||
void f___rvv_float16mf4x6_t () {__rvv_float16mf4x6_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x6_t'} } */
|
||||
void f___rvv_float16mf4x7_t () {__rvv_float16mf4x7_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x7_t'} } */
|
||||
void f___rvv_float16mf4x8_t () {__rvv_float16mf4x8_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x8_t'} } */
|
||||
void f___rvv_float16mf2x2_t () {__rvv_float16mf2x2_t t;}
|
||||
void f___rvv_float16mf2x3_t () {__rvv_float16mf2x3_t t;}
|
||||
void f___rvv_float16mf2x4_t () {__rvv_float16mf2x4_t t;}
|
||||
void f___rvv_float16mf2x5_t () {__rvv_float16mf2x5_t t;}
|
||||
void f___rvv_float16mf2x6_t () {__rvv_float16mf2x6_t t;}
|
||||
void f___rvv_float16mf2x7_t () {__rvv_float16mf2x7_t t;}
|
||||
void f___rvv_float16mf2x8_t () {__rvv_float16mf2x8_t t;}
|
||||
void f___rvv_float16m1x2_t () {__rvv_float16m1x2_t t;}
|
||||
void f___rvv_float16m1x3_t () {__rvv_float16m1x3_t t;}
|
||||
void f___rvv_float16m1x4_t () {__rvv_float16m1x4_t t;}
|
||||
void f___rvv_float16m1x5_t () {__rvv_float16m1x5_t t;}
|
||||
void f___rvv_float16m1x6_t () {__rvv_float16m1x6_t t;}
|
||||
void f___rvv_float16m1x7_t () {__rvv_float16m1x7_t t;}
|
||||
void f___rvv_float16m1x8_t () {__rvv_float16m1x8_t t;}
|
||||
void f___rvv_float16m2x2_t () {__rvv_float16m2x2_t t;}
|
||||
void f___rvv_float16m2x3_t () {__rvv_float16m2x3_t t;}
|
||||
void f___rvv_float16m2x4_t () {__rvv_float16m2x4_t t;}
|
||||
void f___rvv_float16m4x2_t () {__rvv_float16m4x2_t t;}
|
||||
void f___rvv_float32mf2x2_t () {__rvv_float32mf2x2_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x2_t'} } */
|
||||
void f___rvv_float32mf2x3_t () {__rvv_float32mf2x3_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x3_t'} } */
|
||||
void f___rvv_float32mf2x4_t () {__rvv_float32mf2x4_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x4_t'} } */
|
||||
|
|
|
|||
|
|
@ -1,229 +0,0 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-O3 -march=rv32gc_zve32x_zvfhmin -mabi=ilp32d" } */
|
||||
|
||||
void f___rvv_int8mf8x2_t () {__rvv_int8mf8x2_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x2_t'} } */
|
||||
void f___rvv_uint8mf8x2_t () {__rvv_uint8mf8x2_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x2_t'} } */
|
||||
void f___rvv_int8mf8x3_t () {__rvv_int8mf8x3_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x3_t'} } */
|
||||
void f___rvv_uint8mf8x3_t () {__rvv_uint8mf8x3_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x3_t'} } */
|
||||
void f___rvv_int8mf8x4_t () {__rvv_int8mf8x4_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x4_t'} } */
|
||||
void f___rvv_uint8mf8x4_t () {__rvv_uint8mf8x4_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x4_t'} } */
|
||||
void f___rvv_int8mf8x5_t () {__rvv_int8mf8x5_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x5_t'} } */
|
||||
void f___rvv_uint8mf8x5_t () {__rvv_uint8mf8x5_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x5_t'} } */
|
||||
void f___rvv_int8mf8x6_t () {__rvv_int8mf8x6_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x6_t'} } */
|
||||
void f___rvv_uint8mf8x6_t () {__rvv_uint8mf8x6_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x6_t'} } */
|
||||
void f___rvv_int8mf8x7_t () {__rvv_int8mf8x7_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x7_t'} } */
|
||||
void f___rvv_uint8mf8x7_t () {__rvv_uint8mf8x7_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x7_t'} } */
|
||||
void f___rvv_int8mf8x8_t () {__rvv_int8mf8x8_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x8_t'} } */
|
||||
void f___rvv_uint8mf8x8_t () {__rvv_uint8mf8x8_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x8_t'} } */
|
||||
void f___rvv_int8mf4x2_t () {__rvv_int8mf4x2_t t;}
|
||||
void f___rvv_uint8mf4x2_t () {__rvv_uint8mf4x2_t t;}
|
||||
void f___rvv_int8mf4x3_t () {__rvv_int8mf4x3_t t;}
|
||||
void f___rvv_uint8mf4x3_t () {__rvv_uint8mf4x3_t t;}
|
||||
void f___rvv_int8mf4x4_t () {__rvv_int8mf4x4_t t;}
|
||||
void f___rvv_uint8mf4x4_t () {__rvv_uint8mf4x4_t t;}
|
||||
void f___rvv_int8mf4x5_t () {__rvv_int8mf4x5_t t;}
|
||||
void f___rvv_uint8mf4x5_t () {__rvv_uint8mf4x5_t t;}
|
||||
void f___rvv_int8mf4x6_t () {__rvv_int8mf4x6_t t;}
|
||||
void f___rvv_uint8mf4x6_t () {__rvv_uint8mf4x6_t t;}
|
||||
void f___rvv_int8mf4x7_t () {__rvv_int8mf4x7_t t;}
|
||||
void f___rvv_uint8mf4x7_t () {__rvv_uint8mf4x7_t t;}
|
||||
void f___rvv_int8mf4x8_t () {__rvv_int8mf4x8_t t;}
|
||||
void f___rvv_uint8mf4x8_t () {__rvv_uint8mf4x8_t t;}
|
||||
void f___rvv_int8mf2x2_t () {__rvv_int8mf2x2_t t;}
|
||||
void f___rvv_uint8mf2x2_t () {__rvv_uint8mf2x2_t t;}
|
||||
void f___rvv_int8mf2x3_t () {__rvv_int8mf2x3_t t;}
|
||||
void f___rvv_uint8mf2x3_t () {__rvv_uint8mf2x3_t t;}
|
||||
void f___rvv_int8mf2x4_t () {__rvv_int8mf2x4_t t;}
|
||||
void f___rvv_uint8mf2x4_t () {__rvv_uint8mf2x4_t t;}
|
||||
void f___rvv_int8mf2x5_t () {__rvv_int8mf2x5_t t;}
|
||||
void f___rvv_uint8mf2x5_t () {__rvv_uint8mf2x5_t t;}
|
||||
void f___rvv_int8mf2x6_t () {__rvv_int8mf2x6_t t;}
|
||||
void f___rvv_uint8mf2x6_t () {__rvv_uint8mf2x6_t t;}
|
||||
void f___rvv_int8mf2x7_t () {__rvv_int8mf2x7_t t;}
|
||||
void f___rvv_uint8mf2x7_t () {__rvv_uint8mf2x7_t t;}
|
||||
void f___rvv_int8mf2x8_t () {__rvv_int8mf2x8_t t;}
|
||||
void f___rvv_uint8mf2x8_t () {__rvv_uint8mf2x8_t t;}
|
||||
void f___rvv_int8m1x2_t () {__rvv_int8m1x2_t t;}
|
||||
void f___rvv_uint8m1x2_t () {__rvv_uint8m1x2_t t;}
|
||||
void f___rvv_int8m1x3_t () {__rvv_int8m1x3_t t;}
|
||||
void f___rvv_uint8m1x3_t () {__rvv_uint8m1x3_t t;}
|
||||
void f___rvv_int8m1x4_t () {__rvv_int8m1x4_t t;}
|
||||
void f___rvv_uint8m1x4_t () {__rvv_uint8m1x4_t t;}
|
||||
void f___rvv_int8m1x5_t () {__rvv_int8m1x5_t t;}
|
||||
void f___rvv_uint8m1x5_t () {__rvv_uint8m1x5_t t;}
|
||||
void f___rvv_int8m1x6_t () {__rvv_int8m1x6_t t;}
|
||||
void f___rvv_uint8m1x6_t () {__rvv_uint8m1x6_t t;}
|
||||
void f___rvv_int8m1x7_t () {__rvv_int8m1x7_t t;}
|
||||
void f___rvv_uint8m1x7_t () {__rvv_uint8m1x7_t t;}
|
||||
void f___rvv_int8m1x8_t () {__rvv_int8m1x8_t t;}
|
||||
void f___rvv_uint8m1x8_t () {__rvv_uint8m1x8_t t;}
|
||||
void f___rvv_int8m2x2_t () {__rvv_int8m2x2_t t;}
|
||||
void f___rvv_uint8m2x2_t () {__rvv_uint8m2x2_t t;}
|
||||
void f___rvv_int8m2x3_t () {__rvv_int8m2x3_t t;}
|
||||
void f___rvv_uint8m2x3_t () {__rvv_uint8m2x3_t t;}
|
||||
void f___rvv_int8m2x4_t () {__rvv_int8m2x4_t t;}
|
||||
void f___rvv_uint8m2x4_t () {__rvv_uint8m2x4_t t;}
|
||||
void f___rvv_int8m4x2_t () {__rvv_int8m4x2_t t;}
|
||||
void f___rvv_uint8m4x2_t () {__rvv_uint8m4x2_t t;}
|
||||
void f___rvv_int16mf4x2_t () {__rvv_int16mf4x2_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x2_t'} } */
|
||||
void f___rvv_uint16mf4x2_t () {__rvv_uint16mf4x2_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x2_t'} } */
|
||||
void f___rvv_int16mf4x3_t () {__rvv_int16mf4x3_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x3_t'} } */
|
||||
void f___rvv_uint16mf4x3_t () {__rvv_uint16mf4x3_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x3_t'} } */
|
||||
void f___rvv_int16mf4x4_t () {__rvv_int16mf4x4_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x4_t'} } */
|
||||
void f___rvv_uint16mf4x4_t () {__rvv_uint16mf4x4_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x4_t'} } */
|
||||
void f___rvv_int16mf4x5_t () {__rvv_int16mf4x5_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x5_t'} } */
|
||||
void f___rvv_uint16mf4x5_t () {__rvv_uint16mf4x5_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x5_t'} } */
|
||||
void f___rvv_int16mf4x6_t () {__rvv_int16mf4x6_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x6_t'} } */
|
||||
void f___rvv_uint16mf4x6_t () {__rvv_uint16mf4x6_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x6_t'} } */
|
||||
void f___rvv_int16mf4x7_t () {__rvv_int16mf4x7_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x7_t'} } */
|
||||
void f___rvv_uint16mf4x7_t () {__rvv_uint16mf4x7_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x7_t'} } */
|
||||
void f___rvv_int16mf4x8_t () {__rvv_int16mf4x8_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x8_t'} } */
|
||||
void f___rvv_uint16mf4x8_t () {__rvv_uint16mf4x8_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x8_t'} } */
|
||||
void f___rvv_int16mf2x2_t () {__rvv_int16mf2x2_t t;}
|
||||
void f___rvv_uint16mf2x2_t () {__rvv_uint16mf2x2_t t;}
|
||||
void f___rvv_int16mf2x3_t () {__rvv_int16mf2x3_t t;}
|
||||
void f___rvv_uint16mf2x3_t () {__rvv_uint16mf2x3_t t;}
|
||||
void f___rvv_int16mf2x4_t () {__rvv_int16mf2x4_t t;}
|
||||
void f___rvv_uint16mf2x4_t () {__rvv_uint16mf2x4_t t;}
|
||||
void f___rvv_int16mf2x5_t () {__rvv_int16mf2x5_t t;}
|
||||
void f___rvv_uint16mf2x5_t () {__rvv_uint16mf2x5_t t;}
|
||||
void f___rvv_int16mf2x6_t () {__rvv_int16mf2x6_t t;}
|
||||
void f___rvv_uint16mf2x6_t () {__rvv_uint16mf2x6_t t;}
|
||||
void f___rvv_int16mf2x7_t () {__rvv_int16mf2x7_t t;}
|
||||
void f___rvv_uint16mf2x7_t () {__rvv_uint16mf2x7_t t;}
|
||||
void f___rvv_int16mf2x8_t () {__rvv_int16mf2x8_t t;}
|
||||
void f___rvv_uint16mf2x8_t () {__rvv_uint16mf2x8_t t;}
|
||||
void f___rvv_int16m1x2_t () {__rvv_int16m1x2_t t;}
|
||||
void f___rvv_uint16m1x2_t () {__rvv_uint16m1x2_t t;}
|
||||
void f___rvv_int16m1x3_t () {__rvv_int16m1x3_t t;}
|
||||
void f___rvv_uint16m1x3_t () {__rvv_uint16m1x3_t t;}
|
||||
void f___rvv_int16m1x4_t () {__rvv_int16m1x4_t t;}
|
||||
void f___rvv_uint16m1x4_t () {__rvv_uint16m1x4_t t;}
|
||||
void f___rvv_int16m1x5_t () {__rvv_int16m1x5_t t;}
|
||||
void f___rvv_uint16m1x5_t () {__rvv_uint16m1x5_t t;}
|
||||
void f___rvv_int16m1x6_t () {__rvv_int16m1x6_t t;}
|
||||
void f___rvv_uint16m1x6_t () {__rvv_uint16m1x6_t t;}
|
||||
void f___rvv_int16m1x7_t () {__rvv_int16m1x7_t t;}
|
||||
void f___rvv_uint16m1x7_t () {__rvv_uint16m1x7_t t;}
|
||||
void f___rvv_int16m1x8_t () {__rvv_int16m1x8_t t;}
|
||||
void f___rvv_uint16m1x8_t () {__rvv_uint16m1x8_t t;}
|
||||
void f___rvv_int16m2x2_t () {__rvv_int16m2x2_t t;}
|
||||
void f___rvv_uint16m2x2_t () {__rvv_uint16m2x2_t t;}
|
||||
void f___rvv_int16m2x3_t () {__rvv_int16m2x3_t t;}
|
||||
void f___rvv_uint16m2x3_t () {__rvv_uint16m2x3_t t;}
|
||||
void f___rvv_int16m2x4_t () {__rvv_int16m2x4_t t;}
|
||||
void f___rvv_uint16m2x4_t () {__rvv_uint16m2x4_t t;}
|
||||
void f___rvv_int16m4x2_t () {__rvv_int16m4x2_t t;}
|
||||
void f___rvv_uint16m4x2_t () {__rvv_uint16m4x2_t t;}
|
||||
void f___rvv_int32mf2x2_t () {__rvv_int32mf2x2_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x2_t'} } */
|
||||
void f___rvv_uint32mf2x2_t () {__rvv_uint32mf2x2_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x2_t'} } */
|
||||
void f___rvv_int32mf2x3_t () {__rvv_int32mf2x3_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x3_t'} } */
|
||||
void f___rvv_uint32mf2x3_t () {__rvv_uint32mf2x3_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x3_t'} } */
|
||||
void f___rvv_int32mf2x4_t () {__rvv_int32mf2x4_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x4_t'} } */
|
||||
void f___rvv_uint32mf2x4_t () {__rvv_uint32mf2x4_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x4_t'} } */
|
||||
void f___rvv_int32mf2x5_t () {__rvv_int32mf2x5_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x5_t'} } */
|
||||
void f___rvv_uint32mf2x5_t () {__rvv_uint32mf2x5_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x5_t'} } */
|
||||
void f___rvv_int32mf2x6_t () {__rvv_int32mf2x6_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x6_t'} } */
|
||||
void f___rvv_uint32mf2x6_t () {__rvv_uint32mf2x6_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x6_t'} } */
|
||||
void f___rvv_int32mf2x7_t () {__rvv_int32mf2x7_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x7_t'} } */
|
||||
void f___rvv_uint32mf2x7_t () {__rvv_uint32mf2x7_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x7_t'} } */
|
||||
void f___rvv_int32mf2x8_t () {__rvv_int32mf2x8_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x8_t'} } */
|
||||
void f___rvv_uint32mf2x8_t () {__rvv_uint32mf2x8_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x8_t'} } */
|
||||
void f___rvv_int32m1x2_t () {__rvv_int32m1x2_t t;}
|
||||
void f___rvv_uint32m1x2_t () {__rvv_uint32m1x2_t t;}
|
||||
void f___rvv_int32m1x3_t () {__rvv_int32m1x3_t t;}
|
||||
void f___rvv_uint32m1x3_t () {__rvv_uint32m1x3_t t;}
|
||||
void f___rvv_int32m1x4_t () {__rvv_int32m1x4_t t;}
|
||||
void f___rvv_uint32m1x4_t () {__rvv_uint32m1x4_t t;}
|
||||
void f___rvv_int32m1x5_t () {__rvv_int32m1x5_t t;}
|
||||
void f___rvv_uint32m1x5_t () {__rvv_uint32m1x5_t t;}
|
||||
void f___rvv_int32m1x6_t () {__rvv_int32m1x6_t t;}
|
||||
void f___rvv_uint32m1x6_t () {__rvv_uint32m1x6_t t;}
|
||||
void f___rvv_int32m1x7_t () {__rvv_int32m1x7_t t;}
|
||||
void f___rvv_uint32m1x7_t () {__rvv_uint32m1x7_t t;}
|
||||
void f___rvv_int32m1x8_t () {__rvv_int32m1x8_t t;}
|
||||
void f___rvv_uint32m1x8_t () {__rvv_uint32m1x8_t t;}
|
||||
void f___rvv_int32m2x2_t () {__rvv_int32m2x2_t t;}
|
||||
void f___rvv_uint32m2x2_t () {__rvv_uint32m2x2_t t;}
|
||||
void f___rvv_int32m2x3_t () {__rvv_int32m2x3_t t;}
|
||||
void f___rvv_uint32m2x3_t () {__rvv_uint32m2x3_t t;}
|
||||
void f___rvv_int32m2x4_t () {__rvv_int32m2x4_t t;}
|
||||
void f___rvv_uint32m2x4_t () {__rvv_uint32m2x4_t t;}
|
||||
void f___rvv_int32m4x2_t () {__rvv_int32m4x2_t t;}
|
||||
void f___rvv_uint32m4x2_t () {__rvv_uint32m4x2_t t;}
|
||||
void f___rvv_int64m1x2_t () {__rvv_int64m1x2_t t;} /* { dg-error {unknown type name '__rvv_int64m1x2_t'} } */
|
||||
void f___rvv_uint64m1x2_t () {__rvv_uint64m1x2_t t;} /* { dg-error {unknown type name '__rvv_uint64m1x2_t'} } */
|
||||
void f___rvv_int64m1x3_t () {__rvv_int64m1x3_t t;} /* { dg-error {unknown type name '__rvv_int64m1x3_t'} } */
|
||||
void f___rvv_uint64m1x3_t () {__rvv_uint64m1x3_t t;} /* { dg-error {unknown type name '__rvv_uint64m1x3_t'} } */
|
||||
void f___rvv_int64m1x4_t () {__rvv_int64m1x4_t t;} /* { dg-error {unknown type name '__rvv_int64m1x4_t'} } */
|
||||
void f___rvv_uint64m1x4_t () {__rvv_uint64m1x4_t t;} /* { dg-error {unknown type name '__rvv_uint64m1x4_t'} } */
|
||||
void f___rvv_int64m1x5_t () {__rvv_int64m1x5_t t;} /* { dg-error {unknown type name '__rvv_int64m1x5_t'} } */
|
||||
void f___rvv_uint64m1x5_t () {__rvv_uint64m1x5_t t;} /* { dg-error {unknown type name '__rvv_uint64m1x5_t'} } */
|
||||
void f___rvv_int64m1x6_t () {__rvv_int64m1x6_t t;} /* { dg-error {unknown type name '__rvv_int64m1x6_t'} } */
|
||||
void f___rvv_uint64m1x6_t () {__rvv_uint64m1x6_t t;} /* { dg-error {unknown type name '__rvv_uint64m1x6_t'} } */
|
||||
void f___rvv_int64m1x7_t () {__rvv_int64m1x7_t t;} /* { dg-error {unknown type name '__rvv_int64m1x7_t'} } */
|
||||
void f___rvv_uint64m1x7_t () {__rvv_uint64m1x7_t t;} /* { dg-error {unknown type name '__rvv_uint64m1x7_t'} } */
|
||||
void f___rvv_int64m1x8_t () {__rvv_int64m1x8_t t;} /* { dg-error {unknown type name '__rvv_int64m1x8_t'} } */
|
||||
void f___rvv_uint64m1x8_t () {__rvv_uint64m1x8_t t;} /* { dg-error {unknown type name '__rvv_uint64m1x8_t'} } */
|
||||
void f___rvv_int64m2x2_t () {__rvv_int64m2x2_t t;} /* { dg-error {unknown type name '__rvv_int64m2x2_t'} } */
|
||||
void f___rvv_uint64m2x2_t () {__rvv_uint64m2x2_t t;} /* { dg-error {unknown type name '__rvv_uint64m2x2_t'} } */
|
||||
void f___rvv_int64m2x3_t () {__rvv_int64m2x3_t t;} /* { dg-error {unknown type name '__rvv_int64m2x3_t'} } */
|
||||
void f___rvv_uint64m2x3_t () {__rvv_uint64m2x3_t t;} /* { dg-error {unknown type name '__rvv_uint64m2x3_t'} } */
|
||||
void f___rvv_int64m2x4_t () {__rvv_int64m2x4_t t;} /* { dg-error {unknown type name '__rvv_int64m2x4_t'} } */
|
||||
void f___rvv_uint64m2x4_t () {__rvv_uint64m2x4_t t;} /* { dg-error {unknown type name '__rvv_uint64m2x4_t'} } */
|
||||
void f___rvv_int64m4x2_t () {__rvv_int64m4x2_t t;} /* { dg-error {unknown type name '__rvv_int64m4x2_t'} } */
|
||||
void f___rvv_uint64m4x2_t () {__rvv_uint64m4x2_t t;} /* { dg-error {unknown type name '__rvv_uint64m4x2_t'} } */
|
||||
void f___rvv_float16mf4x2_t () {__rvv_float16mf4x2_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x2_t'} } */
|
||||
void f___rvv_float16mf4x3_t () {__rvv_float16mf4x3_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x3_t'} } */
|
||||
void f___rvv_float16mf4x4_t () {__rvv_float16mf4x4_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x4_t'} } */
|
||||
void f___rvv_float16mf4x5_t () {__rvv_float16mf4x5_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x5_t'} } */
|
||||
void f___rvv_float16mf4x6_t () {__rvv_float16mf4x6_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x6_t'} } */
|
||||
void f___rvv_float16mf4x7_t () {__rvv_float16mf4x7_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x7_t'} } */
|
||||
void f___rvv_float16mf4x8_t () {__rvv_float16mf4x8_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x8_t'} } */
|
||||
void f___rvv_float16mf2x2_t () {__rvv_float16mf2x2_t t;}
|
||||
void f___rvv_float16mf2x3_t () {__rvv_float16mf2x3_t t;}
|
||||
void f___rvv_float16mf2x4_t () {__rvv_float16mf2x4_t t;}
|
||||
void f___rvv_float16mf2x5_t () {__rvv_float16mf2x5_t t;}
|
||||
void f___rvv_float16mf2x6_t () {__rvv_float16mf2x6_t t;}
|
||||
void f___rvv_float16mf2x7_t () {__rvv_float16mf2x7_t t;}
|
||||
void f___rvv_float16mf2x8_t () {__rvv_float16mf2x8_t t;}
|
||||
void f___rvv_float16m1x2_t () {__rvv_float16m1x2_t t;}
|
||||
void f___rvv_float16m1x3_t () {__rvv_float16m1x3_t t;}
|
||||
void f___rvv_float16m1x4_t () {__rvv_float16m1x4_t t;}
|
||||
void f___rvv_float16m1x5_t () {__rvv_float16m1x5_t t;}
|
||||
void f___rvv_float16m1x6_t () {__rvv_float16m1x6_t t;}
|
||||
void f___rvv_float16m1x7_t () {__rvv_float16m1x7_t t;}
|
||||
void f___rvv_float16m1x8_t () {__rvv_float16m1x8_t t;}
|
||||
void f___rvv_float16m2x2_t () {__rvv_float16m2x2_t t;}
|
||||
void f___rvv_float16m2x3_t () {__rvv_float16m2x3_t t;}
|
||||
void f___rvv_float16m2x4_t () {__rvv_float16m2x4_t t;}
|
||||
void f___rvv_float16m4x2_t () {__rvv_float16m4x2_t t;}
|
||||
void f___rvv_float32mf2x2_t () {__rvv_float32mf2x2_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x2_t'} } */
|
||||
void f___rvv_float32mf2x3_t () {__rvv_float32mf2x3_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x3_t'} } */
|
||||
void f___rvv_float32mf2x4_t () {__rvv_float32mf2x4_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x4_t'} } */
|
||||
void f___rvv_float32mf2x5_t () {__rvv_float32mf2x5_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x5_t'} } */
|
||||
void f___rvv_float32mf2x6_t () {__rvv_float32mf2x6_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x6_t'} } */
|
||||
void f___rvv_float32mf2x7_t () {__rvv_float32mf2x7_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x7_t'} } */
|
||||
void f___rvv_float32mf2x8_t () {__rvv_float32mf2x8_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x8_t'} } */
|
||||
void f___rvv_float32m1x2_t () {__rvv_float32m1x2_t t;}
|
||||
void f___rvv_float32m1x3_t () {__rvv_float32m1x3_t t;}
|
||||
void f___rvv_float32m1x4_t () {__rvv_float32m1x4_t t;}
|
||||
void f___rvv_float32m1x5_t () {__rvv_float32m1x5_t t;}
|
||||
void f___rvv_float32m1x6_t () {__rvv_float32m1x6_t t;}
|
||||
void f___rvv_float32m1x7_t () {__rvv_float32m1x7_t t;}
|
||||
void f___rvv_float32m1x8_t () {__rvv_float32m1x8_t t;}
|
||||
void f___rvv_float32m2x2_t () {__rvv_float32m2x2_t t;}
|
||||
void f___rvv_float32m2x3_t () {__rvv_float32m2x3_t t;}
|
||||
void f___rvv_float32m2x4_t () {__rvv_float32m2x4_t t;}
|
||||
void f___rvv_float32m4x2_t () {__rvv_float32m4x2_t t;}
|
||||
void f___rvv_float64m1x2_t () {__rvv_float64m1x2_t t;} /* { dg-error {unknown type name '__rvv_float64m1x2_t'} } */
|
||||
void f___rvv_float64m1x3_t () {__rvv_float64m1x3_t t;} /* { dg-error {unknown type name '__rvv_float64m1x3_t'} } */
|
||||
void f___rvv_float64m1x4_t () {__rvv_float64m1x4_t t;} /* { dg-error {unknown type name '__rvv_float64m1x4_t'} } */
|
||||
void f___rvv_float64m1x5_t () {__rvv_float64m1x5_t t;} /* { dg-error {unknown type name '__rvv_float64m1x5_t'} } */
|
||||
void f___rvv_float64m1x6_t () {__rvv_float64m1x6_t t;} /* { dg-error {unknown type name '__rvv_float64m1x6_t'} } */
|
||||
void f___rvv_float64m1x7_t () {__rvv_float64m1x7_t t;} /* { dg-error {unknown type name '__rvv_float64m1x7_t'} } */
|
||||
void f___rvv_float64m1x8_t () {__rvv_float64m1x8_t t;} /* { dg-error {unknown type name '__rvv_float64m1x8_t'} } */
|
||||
void f___rvv_float64m2x2_t () {__rvv_float64m2x2_t t;} /* { dg-error {unknown type name '__rvv_float64m2x2_t'} } */
|
||||
void f___rvv_float64m2x3_t () {__rvv_float64m2x3_t t;} /* { dg-error {unknown type name '__rvv_float64m2x3_t'} } */
|
||||
void f___rvv_float64m2x4_t () {__rvv_float64m2x4_t t;} /* { dg-error {unknown type name '__rvv_float64m2x4_t'} } */
|
||||
void f___rvv_float64m4x2_t () {__rvv_float64m4x2_t t;} /* { dg-error {unknown type name '__rvv_float64m4x2_t'} } */
|
||||
|
|
@ -1,229 +0,0 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-O3 -march=rv32gc_zve32x_zvl64b_zvfhmin -mabi=ilp32d" } */
|
||||
|
||||
void f___rvv_int8mf8x2_t () {__rvv_int8mf8x2_t t;}
|
||||
void f___rvv_uint8mf8x2_t () {__rvv_uint8mf8x2_t t;}
|
||||
void f___rvv_int8mf8x3_t () {__rvv_int8mf8x3_t t;}
|
||||
void f___rvv_uint8mf8x3_t () {__rvv_uint8mf8x3_t t;}
|
||||
void f___rvv_int8mf8x4_t () {__rvv_int8mf8x4_t t;}
|
||||
void f___rvv_uint8mf8x4_t () {__rvv_uint8mf8x4_t t;}
|
||||
void f___rvv_int8mf8x5_t () {__rvv_int8mf8x5_t t;}
|
||||
void f___rvv_uint8mf8x5_t () {__rvv_uint8mf8x5_t t;}
|
||||
void f___rvv_int8mf8x6_t () {__rvv_int8mf8x6_t t;}
|
||||
void f___rvv_uint8mf8x6_t () {__rvv_uint8mf8x6_t t;}
|
||||
void f___rvv_int8mf8x7_t () {__rvv_int8mf8x7_t t;}
|
||||
void f___rvv_uint8mf8x7_t () {__rvv_uint8mf8x7_t t;}
|
||||
void f___rvv_int8mf8x8_t () {__rvv_int8mf8x8_t t;}
|
||||
void f___rvv_uint8mf8x8_t () {__rvv_uint8mf8x8_t t;}
|
||||
void f___rvv_int8mf4x2_t () {__rvv_int8mf4x2_t t;}
|
||||
void f___rvv_uint8mf4x2_t () {__rvv_uint8mf4x2_t t;}
|
||||
void f___rvv_int8mf4x3_t () {__rvv_int8mf4x3_t t;}
|
||||
void f___rvv_uint8mf4x3_t () {__rvv_uint8mf4x3_t t;}
|
||||
void f___rvv_int8mf4x4_t () {__rvv_int8mf4x4_t t;}
|
||||
void f___rvv_uint8mf4x4_t () {__rvv_uint8mf4x4_t t;}
|
||||
void f___rvv_int8mf4x5_t () {__rvv_int8mf4x5_t t;}
|
||||
void f___rvv_uint8mf4x5_t () {__rvv_uint8mf4x5_t t;}
|
||||
void f___rvv_int8mf4x6_t () {__rvv_int8mf4x6_t t;}
|
||||
void f___rvv_uint8mf4x6_t () {__rvv_uint8mf4x6_t t;}
|
||||
void f___rvv_int8mf4x7_t () {__rvv_int8mf4x7_t t;}
|
||||
void f___rvv_uint8mf4x7_t () {__rvv_uint8mf4x7_t t;}
|
||||
void f___rvv_int8mf4x8_t () {__rvv_int8mf4x8_t t;}
|
||||
void f___rvv_uint8mf4x8_t () {__rvv_uint8mf4x8_t t;}
|
||||
void f___rvv_int8mf2x2_t () {__rvv_int8mf2x2_t t;}
|
||||
void f___rvv_uint8mf2x2_t () {__rvv_uint8mf2x2_t t;}
|
||||
void f___rvv_int8mf2x3_t () {__rvv_int8mf2x3_t t;}
|
||||
void f___rvv_uint8mf2x3_t () {__rvv_uint8mf2x3_t t;}
|
||||
void f___rvv_int8mf2x4_t () {__rvv_int8mf2x4_t t;}
|
||||
void f___rvv_uint8mf2x4_t () {__rvv_uint8mf2x4_t t;}
|
||||
void f___rvv_int8mf2x5_t () {__rvv_int8mf2x5_t t;}
|
||||
void f___rvv_uint8mf2x5_t () {__rvv_uint8mf2x5_t t;}
|
||||
void f___rvv_int8mf2x6_t () {__rvv_int8mf2x6_t t;}
|
||||
void f___rvv_uint8mf2x6_t () {__rvv_uint8mf2x6_t t;}
|
||||
void f___rvv_int8mf2x7_t () {__rvv_int8mf2x7_t t;}
|
||||
void f___rvv_uint8mf2x7_t () {__rvv_uint8mf2x7_t t;}
|
||||
void f___rvv_int8mf2x8_t () {__rvv_int8mf2x8_t t;}
|
||||
void f___rvv_uint8mf2x8_t () {__rvv_uint8mf2x8_t t;}
|
||||
void f___rvv_int8m1x2_t () {__rvv_int8m1x2_t t;}
|
||||
void f___rvv_uint8m1x2_t () {__rvv_uint8m1x2_t t;}
|
||||
void f___rvv_int8m1x3_t () {__rvv_int8m1x3_t t;}
|
||||
void f___rvv_uint8m1x3_t () {__rvv_uint8m1x3_t t;}
|
||||
void f___rvv_int8m1x4_t () {__rvv_int8m1x4_t t;}
|
||||
void f___rvv_uint8m1x4_t () {__rvv_uint8m1x4_t t;}
|
||||
void f___rvv_int8m1x5_t () {__rvv_int8m1x5_t t;}
|
||||
void f___rvv_uint8m1x5_t () {__rvv_uint8m1x5_t t;}
|
||||
void f___rvv_int8m1x6_t () {__rvv_int8m1x6_t t;}
|
||||
void f___rvv_uint8m1x6_t () {__rvv_uint8m1x6_t t;}
|
||||
void f___rvv_int8m1x7_t () {__rvv_int8m1x7_t t;}
|
||||
void f___rvv_uint8m1x7_t () {__rvv_uint8m1x7_t t;}
|
||||
void f___rvv_int8m1x8_t () {__rvv_int8m1x8_t t;}
|
||||
void f___rvv_uint8m1x8_t () {__rvv_uint8m1x8_t t;}
|
||||
void f___rvv_int8m2x2_t () {__rvv_int8m2x2_t t;}
|
||||
void f___rvv_uint8m2x2_t () {__rvv_uint8m2x2_t t;}
|
||||
void f___rvv_int8m2x3_t () {__rvv_int8m2x3_t t;}
|
||||
void f___rvv_uint8m2x3_t () {__rvv_uint8m2x3_t t;}
|
||||
void f___rvv_int8m2x4_t () {__rvv_int8m2x4_t t;}
|
||||
void f___rvv_uint8m2x4_t () {__rvv_uint8m2x4_t t;}
|
||||
void f___rvv_int8m4x2_t () {__rvv_int8m4x2_t t;}
|
||||
void f___rvv_uint8m4x2_t () {__rvv_uint8m4x2_t t;}
|
||||
void f___rvv_int16mf4x2_t () {__rvv_int16mf4x2_t t;}
|
||||
void f___rvv_uint16mf4x2_t () {__rvv_uint16mf4x2_t t;}
|
||||
void f___rvv_int16mf4x3_t () {__rvv_int16mf4x3_t t;}
|
||||
void f___rvv_uint16mf4x3_t () {__rvv_uint16mf4x3_t t;}
|
||||
void f___rvv_int16mf4x4_t () {__rvv_int16mf4x4_t t;}
|
||||
void f___rvv_uint16mf4x4_t () {__rvv_uint16mf4x4_t t;}
|
||||
void f___rvv_int16mf4x5_t () {__rvv_int16mf4x5_t t;}
|
||||
void f___rvv_uint16mf4x5_t () {__rvv_uint16mf4x5_t t;}
|
||||
void f___rvv_int16mf4x6_t () {__rvv_int16mf4x6_t t;}
|
||||
void f___rvv_uint16mf4x6_t () {__rvv_uint16mf4x6_t t;}
|
||||
void f___rvv_int16mf4x7_t () {__rvv_int16mf4x7_t t;}
|
||||
void f___rvv_uint16mf4x7_t () {__rvv_uint16mf4x7_t t;}
|
||||
void f___rvv_int16mf4x8_t () {__rvv_int16mf4x8_t t;}
|
||||
void f___rvv_uint16mf4x8_t () {__rvv_uint16mf4x8_t t;}
|
||||
void f___rvv_int16mf2x2_t () {__rvv_int16mf2x2_t t;}
|
||||
void f___rvv_uint16mf2x2_t () {__rvv_uint16mf2x2_t t;}
|
||||
void f___rvv_int16mf2x3_t () {__rvv_int16mf2x3_t t;}
|
||||
void f___rvv_uint16mf2x3_t () {__rvv_uint16mf2x3_t t;}
|
||||
void f___rvv_int16mf2x4_t () {__rvv_int16mf2x4_t t;}
|
||||
void f___rvv_uint16mf2x4_t () {__rvv_uint16mf2x4_t t;}
|
||||
void f___rvv_int16mf2x5_t () {__rvv_int16mf2x5_t t;}
|
||||
void f___rvv_uint16mf2x5_t () {__rvv_uint16mf2x5_t t;}
|
||||
void f___rvv_int16mf2x6_t () {__rvv_int16mf2x6_t t;}
|
||||
void f___rvv_uint16mf2x6_t () {__rvv_uint16mf2x6_t t;}
|
||||
void f___rvv_int16mf2x7_t () {__rvv_int16mf2x7_t t;}
|
||||
void f___rvv_uint16mf2x7_t () {__rvv_uint16mf2x7_t t;}
|
||||
void f___rvv_int16mf2x8_t () {__rvv_int16mf2x8_t t;}
|
||||
void f___rvv_uint16mf2x8_t () {__rvv_uint16mf2x8_t t;}
|
||||
void f___rvv_int16m1x2_t () {__rvv_int16m1x2_t t;}
|
||||
void f___rvv_uint16m1x2_t () {__rvv_uint16m1x2_t t;}
|
||||
void f___rvv_int16m1x3_t () {__rvv_int16m1x3_t t;}
|
||||
void f___rvv_uint16m1x3_t () {__rvv_uint16m1x3_t t;}
|
||||
void f___rvv_int16m1x4_t () {__rvv_int16m1x4_t t;}
|
||||
void f___rvv_uint16m1x4_t () {__rvv_uint16m1x4_t t;}
|
||||
void f___rvv_int16m1x5_t () {__rvv_int16m1x5_t t;}
|
||||
void f___rvv_uint16m1x5_t () {__rvv_uint16m1x5_t t;}
|
||||
void f___rvv_int16m1x6_t () {__rvv_int16m1x6_t t;}
|
||||
void f___rvv_uint16m1x6_t () {__rvv_uint16m1x6_t t;}
|
||||
void f___rvv_int16m1x7_t () {__rvv_int16m1x7_t t;}
|
||||
void f___rvv_uint16m1x7_t () {__rvv_uint16m1x7_t t;}
|
||||
void f___rvv_int16m1x8_t () {__rvv_int16m1x8_t t;}
|
||||
void f___rvv_uint16m1x8_t () {__rvv_uint16m1x8_t t;}
|
||||
void f___rvv_int16m2x2_t () {__rvv_int16m2x2_t t;}
|
||||
void f___rvv_uint16m2x2_t () {__rvv_uint16m2x2_t t;}
|
||||
void f___rvv_int16m2x3_t () {__rvv_int16m2x3_t t;}
|
||||
void f___rvv_uint16m2x3_t () {__rvv_uint16m2x3_t t;}
|
||||
void f___rvv_int16m2x4_t () {__rvv_int16m2x4_t t;}
|
||||
void f___rvv_uint16m2x4_t () {__rvv_uint16m2x4_t t;}
|
||||
void f___rvv_int16m4x2_t () {__rvv_int16m4x2_t t;}
|
||||
void f___rvv_uint16m4x2_t () {__rvv_uint16m4x2_t t;}
|
||||
void f___rvv_int32mf2x2_t () {__rvv_int32mf2x2_t t;}
|
||||
void f___rvv_uint32mf2x2_t () {__rvv_uint32mf2x2_t t;}
|
||||
void f___rvv_int32mf2x3_t () {__rvv_int32mf2x3_t t;}
|
||||
void f___rvv_uint32mf2x3_t () {__rvv_uint32mf2x3_t t;}
|
||||
void f___rvv_int32mf2x4_t () {__rvv_int32mf2x4_t t;}
|
||||
void f___rvv_uint32mf2x4_t () {__rvv_uint32mf2x4_t t;}
|
||||
void f___rvv_int32mf2x5_t () {__rvv_int32mf2x5_t t;}
|
||||
void f___rvv_uint32mf2x5_t () {__rvv_uint32mf2x5_t t;}
|
||||
void f___rvv_int32mf2x6_t () {__rvv_int32mf2x6_t t;}
|
||||
void f___rvv_uint32mf2x6_t () {__rvv_uint32mf2x6_t t;}
|
||||
void f___rvv_int32mf2x7_t () {__rvv_int32mf2x7_t t;}
|
||||
void f___rvv_uint32mf2x7_t () {__rvv_uint32mf2x7_t t;}
|
||||
void f___rvv_int32mf2x8_t () {__rvv_int32mf2x8_t t;}
|
||||
void f___rvv_uint32mf2x8_t () {__rvv_uint32mf2x8_t t;}
|
||||
void f___rvv_int32m1x2_t () {__rvv_int32m1x2_t t;}
|
||||
void f___rvv_uint32m1x2_t () {__rvv_uint32m1x2_t t;}
|
||||
void f___rvv_int32m1x3_t () {__rvv_int32m1x3_t t;}
|
||||
void f___rvv_uint32m1x3_t () {__rvv_uint32m1x3_t t;}
|
||||
void f___rvv_int32m1x4_t () {__rvv_int32m1x4_t t;}
|
||||
void f___rvv_uint32m1x4_t () {__rvv_uint32m1x4_t t;}
|
||||
void f___rvv_int32m1x5_t () {__rvv_int32m1x5_t t;}
|
||||
void f___rvv_uint32m1x5_t () {__rvv_uint32m1x5_t t;}
|
||||
void f___rvv_int32m1x6_t () {__rvv_int32m1x6_t t;}
|
||||
void f___rvv_uint32m1x6_t () {__rvv_uint32m1x6_t t;}
|
||||
void f___rvv_int32m1x7_t () {__rvv_int32m1x7_t t;}
|
||||
void f___rvv_uint32m1x7_t () {__rvv_uint32m1x7_t t;}
|
||||
void f___rvv_int32m1x8_t () {__rvv_int32m1x8_t t;}
|
||||
void f___rvv_uint32m1x8_t () {__rvv_uint32m1x8_t t;}
|
||||
void f___rvv_int32m2x2_t () {__rvv_int32m2x2_t t;}
|
||||
void f___rvv_uint32m2x2_t () {__rvv_uint32m2x2_t t;}
|
||||
void f___rvv_int32m2x3_t () {__rvv_int32m2x3_t t;}
|
||||
void f___rvv_uint32m2x3_t () {__rvv_uint32m2x3_t t;}
|
||||
void f___rvv_int32m2x4_t () {__rvv_int32m2x4_t t;}
|
||||
void f___rvv_uint32m2x4_t () {__rvv_uint32m2x4_t t;}
|
||||
void f___rvv_int32m4x2_t () {__rvv_int32m4x2_t t;}
|
||||
void f___rvv_uint32m4x2_t () {__rvv_uint32m4x2_t t;}
|
||||
void f___rvv_int64m1x2_t () {__rvv_int64m1x2_t t;} /* { dg-error {unknown type name '__rvv_int64m1x2_t'} } */
|
||||
void f___rvv_uint64m1x2_t () {__rvv_uint64m1x2_t t;} /* { dg-error {unknown type name '__rvv_uint64m1x2_t'} } */
|
||||
void f___rvv_int64m1x3_t () {__rvv_int64m1x3_t t;} /* { dg-error {unknown type name '__rvv_int64m1x3_t'} } */
|
||||
void f___rvv_uint64m1x3_t () {__rvv_uint64m1x3_t t;} /* { dg-error {unknown type name '__rvv_uint64m1x3_t'} } */
|
||||
void f___rvv_int64m1x4_t () {__rvv_int64m1x4_t t;} /* { dg-error {unknown type name '__rvv_int64m1x4_t'} } */
|
||||
void f___rvv_uint64m1x4_t () {__rvv_uint64m1x4_t t;} /* { dg-error {unknown type name '__rvv_uint64m1x4_t'} } */
|
||||
void f___rvv_int64m1x5_t () {__rvv_int64m1x5_t t;} /* { dg-error {unknown type name '__rvv_int64m1x5_t'} } */
|
||||
void f___rvv_uint64m1x5_t () {__rvv_uint64m1x5_t t;} /* { dg-error {unknown type name '__rvv_uint64m1x5_t'} } */
|
||||
void f___rvv_int64m1x6_t () {__rvv_int64m1x6_t t;} /* { dg-error {unknown type name '__rvv_int64m1x6_t'} } */
|
||||
void f___rvv_uint64m1x6_t () {__rvv_uint64m1x6_t t;} /* { dg-error {unknown type name '__rvv_uint64m1x6_t'} } */
|
||||
void f___rvv_int64m1x7_t () {__rvv_int64m1x7_t t;} /* { dg-error {unknown type name '__rvv_int64m1x7_t'} } */
|
||||
void f___rvv_uint64m1x7_t () {__rvv_uint64m1x7_t t;} /* { dg-error {unknown type name '__rvv_uint64m1x7_t'} } */
|
||||
void f___rvv_int64m1x8_t () {__rvv_int64m1x8_t t;} /* { dg-error {unknown type name '__rvv_int64m1x8_t'} } */
|
||||
void f___rvv_uint64m1x8_t () {__rvv_uint64m1x8_t t;} /* { dg-error {unknown type name '__rvv_uint64m1x8_t'} } */
|
||||
void f___rvv_int64m2x2_t () {__rvv_int64m2x2_t t;} /* { dg-error {unknown type name '__rvv_int64m2x2_t'} } */
|
||||
void f___rvv_uint64m2x2_t () {__rvv_uint64m2x2_t t;} /* { dg-error {unknown type name '__rvv_uint64m2x2_t'} } */
|
||||
void f___rvv_int64m2x3_t () {__rvv_int64m2x3_t t;} /* { dg-error {unknown type name '__rvv_int64m2x3_t'} } */
|
||||
void f___rvv_uint64m2x3_t () {__rvv_uint64m2x3_t t;} /* { dg-error {unknown type name '__rvv_uint64m2x3_t'} } */
|
||||
void f___rvv_int64m2x4_t () {__rvv_int64m2x4_t t;} /* { dg-error {unknown type name '__rvv_int64m2x4_t'} } */
|
||||
void f___rvv_uint64m2x4_t () {__rvv_uint64m2x4_t t;} /* { dg-error {unknown type name '__rvv_uint64m2x4_t'} } */
|
||||
void f___rvv_int64m4x2_t () {__rvv_int64m4x2_t t;} /* { dg-error {unknown type name '__rvv_int64m4x2_t'} } */
|
||||
void f___rvv_uint64m4x2_t () {__rvv_uint64m4x2_t t;} /* { dg-error {unknown type name '__rvv_uint64m4x2_t'} } */
|
||||
void f___rvv_float16mf4x2_t () {__rvv_float16mf4x2_t t;}
|
||||
void f___rvv_float16mf4x3_t () {__rvv_float16mf4x3_t t;}
|
||||
void f___rvv_float16mf4x4_t () {__rvv_float16mf4x4_t t;}
|
||||
void f___rvv_float16mf4x5_t () {__rvv_float16mf4x5_t t;}
|
||||
void f___rvv_float16mf4x6_t () {__rvv_float16mf4x6_t t;}
|
||||
void f___rvv_float16mf4x7_t () {__rvv_float16mf4x7_t t;}
|
||||
void f___rvv_float16mf4x8_t () {__rvv_float16mf4x8_t t;}
|
||||
void f___rvv_float16mf2x2_t () {__rvv_float16mf2x2_t t;}
|
||||
void f___rvv_float16mf2x3_t () {__rvv_float16mf2x3_t t;}
|
||||
void f___rvv_float16mf2x4_t () {__rvv_float16mf2x4_t t;}
|
||||
void f___rvv_float16mf2x5_t () {__rvv_float16mf2x5_t t;}
|
||||
void f___rvv_float16mf2x6_t () {__rvv_float16mf2x6_t t;}
|
||||
void f___rvv_float16mf2x7_t () {__rvv_float16mf2x7_t t;}
|
||||
void f___rvv_float16mf2x8_t () {__rvv_float16mf2x8_t t;}
|
||||
void f___rvv_float16m1x2_t () {__rvv_float16m1x2_t t;}
|
||||
void f___rvv_float16m1x3_t () {__rvv_float16m1x3_t t;}
|
||||
void f___rvv_float16m1x4_t () {__rvv_float16m1x4_t t;}
|
||||
void f___rvv_float16m1x5_t () {__rvv_float16m1x5_t t;}
|
||||
void f___rvv_float16m1x6_t () {__rvv_float16m1x6_t t;}
|
||||
void f___rvv_float16m1x7_t () {__rvv_float16m1x7_t t;}
|
||||
void f___rvv_float16m1x8_t () {__rvv_float16m1x8_t t;}
|
||||
void f___rvv_float16m2x2_t () {__rvv_float16m2x2_t t;}
|
||||
void f___rvv_float16m2x3_t () {__rvv_float16m2x3_t t;}
|
||||
void f___rvv_float16m2x4_t () {__rvv_float16m2x4_t t;}
|
||||
void f___rvv_float16m4x2_t () {__rvv_float16m4x2_t t;}
|
||||
void f___rvv_float32mf2x2_t () {__rvv_float32mf2x2_t t;}
|
||||
void f___rvv_float32mf2x3_t () {__rvv_float32mf2x3_t t;}
|
||||
void f___rvv_float32mf2x4_t () {__rvv_float32mf2x4_t t;}
|
||||
void f___rvv_float32mf2x5_t () {__rvv_float32mf2x5_t t;}
|
||||
void f___rvv_float32mf2x6_t () {__rvv_float32mf2x6_t t;}
|
||||
void f___rvv_float32mf2x7_t () {__rvv_float32mf2x7_t t;}
|
||||
void f___rvv_float32mf2x8_t () {__rvv_float32mf2x8_t t;}
|
||||
void f___rvv_float32m1x2_t () {__rvv_float32m1x2_t t;}
|
||||
void f___rvv_float32m1x3_t () {__rvv_float32m1x3_t t;}
|
||||
void f___rvv_float32m1x4_t () {__rvv_float32m1x4_t t;}
|
||||
void f___rvv_float32m1x5_t () {__rvv_float32m1x5_t t;}
|
||||
void f___rvv_float32m1x6_t () {__rvv_float32m1x6_t t;}
|
||||
void f___rvv_float32m1x7_t () {__rvv_float32m1x7_t t;}
|
||||
void f___rvv_float32m1x8_t () {__rvv_float32m1x8_t t;}
|
||||
void f___rvv_float32m2x2_t () {__rvv_float32m2x2_t t;}
|
||||
void f___rvv_float32m2x3_t () {__rvv_float32m2x3_t t;}
|
||||
void f___rvv_float32m2x4_t () {__rvv_float32m2x4_t t;}
|
||||
void f___rvv_float32m4x2_t () {__rvv_float32m4x2_t t;}
|
||||
void f___rvv_float64m1x2_t () {__rvv_float64m1x2_t t;} /* { dg-error {unknown type name '__rvv_float64m1x2_t'} } */
|
||||
void f___rvv_float64m1x3_t () {__rvv_float64m1x3_t t;} /* { dg-error {unknown type name '__rvv_float64m1x3_t'} } */
|
||||
void f___rvv_float64m1x4_t () {__rvv_float64m1x4_t t;} /* { dg-error {unknown type name '__rvv_float64m1x4_t'} } */
|
||||
void f___rvv_float64m1x5_t () {__rvv_float64m1x5_t t;} /* { dg-error {unknown type name '__rvv_float64m1x5_t'} } */
|
||||
void f___rvv_float64m1x6_t () {__rvv_float64m1x6_t t;} /* { dg-error {unknown type name '__rvv_float64m1x6_t'} } */
|
||||
void f___rvv_float64m1x7_t () {__rvv_float64m1x7_t t;} /* { dg-error {unknown type name '__rvv_float64m1x7_t'} } */
|
||||
void f___rvv_float64m1x8_t () {__rvv_float64m1x8_t t;} /* { dg-error {unknown type name '__rvv_float64m1x8_t'} } */
|
||||
void f___rvv_float64m2x2_t () {__rvv_float64m2x2_t t;} /* { dg-error {unknown type name '__rvv_float64m2x2_t'} } */
|
||||
void f___rvv_float64m2x3_t () {__rvv_float64m2x3_t t;} /* { dg-error {unknown type name '__rvv_float64m2x3_t'} } */
|
||||
void f___rvv_float64m2x4_t () {__rvv_float64m2x4_t t;} /* { dg-error {unknown type name '__rvv_float64m2x4_t'} } */
|
||||
void f___rvv_float64m4x2_t () {__rvv_float64m4x2_t t;} /* { dg-error {unknown type name '__rvv_float64m4x2_t'} } */
|
||||
|
|
@ -1,5 +1,5 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-O3 -march=rv32gcv_zvfhmin -mabi=ilp32d" } */
|
||||
/* { dg-options "-O3 -march=rv32gcv -mabi=ilp32d" } */
|
||||
|
||||
void f___rvv_int8mf8x2_t () {__rvv_int8mf8x2_t t;}
|
||||
void f___rvv_uint8mf8x2_t () {__rvv_uint8mf8x2_t t;}
|
||||
|
|
@ -173,31 +173,6 @@ void f___rvv_int64m2x4_t () {__rvv_int64m2x4_t t;}
|
|||
void f___rvv_uint64m2x4_t () {__rvv_uint64m2x4_t t;}
|
||||
void f___rvv_int64m4x2_t () {__rvv_int64m4x2_t t;}
|
||||
void f___rvv_uint64m4x2_t () {__rvv_uint64m4x2_t t;}
|
||||
void f___rvv_float16mf4x2_t () {__rvv_float16mf4x2_t t;}
|
||||
void f___rvv_float16mf4x3_t () {__rvv_float16mf4x3_t t;}
|
||||
void f___rvv_float16mf4x4_t () {__rvv_float16mf4x4_t t;}
|
||||
void f___rvv_float16mf4x5_t () {__rvv_float16mf4x5_t t;}
|
||||
void f___rvv_float16mf4x6_t () {__rvv_float16mf4x6_t t;}
|
||||
void f___rvv_float16mf4x7_t () {__rvv_float16mf4x7_t t;}
|
||||
void f___rvv_float16mf4x8_t () {__rvv_float16mf4x8_t t;}
|
||||
void f___rvv_float16mf2x2_t () {__rvv_float16mf2x2_t t;}
|
||||
void f___rvv_float16mf2x3_t () {__rvv_float16mf2x3_t t;}
|
||||
void f___rvv_float16mf2x4_t () {__rvv_float16mf2x4_t t;}
|
||||
void f___rvv_float16mf2x5_t () {__rvv_float16mf2x5_t t;}
|
||||
void f___rvv_float16mf2x6_t () {__rvv_float16mf2x6_t t;}
|
||||
void f___rvv_float16mf2x7_t () {__rvv_float16mf2x7_t t;}
|
||||
void f___rvv_float16mf2x8_t () {__rvv_float16mf2x8_t t;}
|
||||
void f___rvv_float16m1x2_t () {__rvv_float16m1x2_t t;}
|
||||
void f___rvv_float16m1x3_t () {__rvv_float16m1x3_t t;}
|
||||
void f___rvv_float16m1x4_t () {__rvv_float16m1x4_t t;}
|
||||
void f___rvv_float16m1x5_t () {__rvv_float16m1x5_t t;}
|
||||
void f___rvv_float16m1x6_t () {__rvv_float16m1x6_t t;}
|
||||
void f___rvv_float16m1x7_t () {__rvv_float16m1x7_t t;}
|
||||
void f___rvv_float16m1x8_t () {__rvv_float16m1x8_t t;}
|
||||
void f___rvv_float16m2x2_t () {__rvv_float16m2x2_t t;}
|
||||
void f___rvv_float16m2x3_t () {__rvv_float16m2x3_t t;}
|
||||
void f___rvv_float16m2x4_t () {__rvv_float16m2x4_t t;}
|
||||
void f___rvv_float16m4x2_t () {__rvv_float16m4x2_t t;}
|
||||
void f___rvv_float32mf2x2_t () {__rvv_float32mf2x2_t t;}
|
||||
void f___rvv_float32mf2x3_t () {__rvv_float32mf2x3_t t;}
|
||||
void f___rvv_float32mf2x4_t () {__rvv_float32mf2x4_t t;}
|
||||
|
|
|
|||
|
|
@ -173,31 +173,6 @@ void f___rvv_int64m2x4_t () {__rvv_int64m2x4_t t;} /* { dg-error {unknown type n
|
|||
void f___rvv_uint64m2x4_t () {__rvv_uint64m2x4_t t;} /* { dg-error {unknown type name '__rvv_uint64m2x4_t'} } */
|
||||
void f___rvv_int64m4x2_t () {__rvv_int64m4x2_t t;} /* { dg-error {unknown type name '__rvv_int64m4x2_t'} } */
|
||||
void f___rvv_uint64m4x2_t () {__rvv_uint64m4x2_t t;} /* { dg-error {unknown type name '__rvv_uint64m4x2_t'} } */
|
||||
void f___rvv_float16mf4x2_t () {__rvv_float16mf4x2_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x2_t'} } */
|
||||
void f___rvv_float16mf4x3_t () {__rvv_float16mf4x3_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x3_t'} } */
|
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void f___rvv_float16mf4x4_t () {__rvv_float16mf4x4_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x4_t'} } */
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void f___rvv_float16mf4x5_t () {__rvv_float16mf4x5_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x5_t'} } */
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void f___rvv_float16mf4x6_t () {__rvv_float16mf4x6_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x6_t'} } */
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void f___rvv_float16mf4x7_t () {__rvv_float16mf4x7_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x7_t'} } */
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void f___rvv_float16mf4x8_t () {__rvv_float16mf4x8_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x8_t'} } */
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void f___rvv_float16mf2x2_t () {__rvv_float16mf2x2_t t;} /* { dg-error {unknown type name '__rvv_float16mf2x2_t'} } */
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void f___rvv_float16mf2x3_t () {__rvv_float16mf2x3_t t;} /* { dg-error {unknown type name '__rvv_float16mf2x3_t'} } */
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void f___rvv_float16mf2x4_t () {__rvv_float16mf2x4_t t;} /* { dg-error {unknown type name '__rvv_float16mf2x4_t'} } */
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void f___rvv_float16mf2x5_t () {__rvv_float16mf2x5_t t;} /* { dg-error {unknown type name '__rvv_float16mf2x5_t'} } */
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void f___rvv_float16mf2x6_t () {__rvv_float16mf2x6_t t;} /* { dg-error {unknown type name '__rvv_float16mf2x6_t'} } */
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void f___rvv_float16mf2x7_t () {__rvv_float16mf2x7_t t;} /* { dg-error {unknown type name '__rvv_float16mf2x7_t'} } */
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void f___rvv_float16mf2x8_t () {__rvv_float16mf2x8_t t;} /* { dg-error {unknown type name '__rvv_float16mf2x8_t'} } */
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void f___rvv_float16m1x2_t () {__rvv_float16m1x2_t t;} /* { dg-error {unknown type name '__rvv_float16m1x2_t'} } */
|
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void f___rvv_float16m1x3_t () {__rvv_float16m1x3_t t;} /* { dg-error {unknown type name '__rvv_float16m1x3_t'} } */
|
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void f___rvv_float16m1x4_t () {__rvv_float16m1x4_t t;} /* { dg-error {unknown type name '__rvv_float16m1x4_t'} } */
|
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void f___rvv_float16m1x5_t () {__rvv_float16m1x5_t t;} /* { dg-error {unknown type name '__rvv_float16m1x5_t'} } */
|
||||
void f___rvv_float16m1x6_t () {__rvv_float16m1x6_t t;} /* { dg-error {unknown type name '__rvv_float16m1x6_t'} } */
|
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void f___rvv_float16m1x7_t () {__rvv_float16m1x7_t t;} /* { dg-error {unknown type name '__rvv_float16m1x7_t'} } */
|
||||
void f___rvv_float16m1x8_t () {__rvv_float16m1x8_t t;} /* { dg-error {unknown type name '__rvv_float16m1x8_t'} } */
|
||||
void f___rvv_float16m2x2_t () {__rvv_float16m2x2_t t;} /* { dg-error {unknown type name '__rvv_float16m2x2_t'} } */
|
||||
void f___rvv_float16m2x3_t () {__rvv_float16m2x3_t t;} /* { dg-error {unknown type name '__rvv_float16m2x3_t'} } */
|
||||
void f___rvv_float16m2x4_t () {__rvv_float16m2x4_t t;} /* { dg-error {unknown type name '__rvv_float16m2x4_t'} } */
|
||||
void f___rvv_float16m4x2_t () {__rvv_float16m4x2_t t;} /* { dg-error {unknown type name '__rvv_float16m4x2_t'} } */
|
||||
void f___rvv_float32mf2x2_t () {__rvv_float32mf2x2_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x2_t'} } */
|
||||
void f___rvv_float32mf2x3_t () {__rvv_float32mf2x3_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x3_t'} } */
|
||||
void f___rvv_float32mf2x4_t () {__rvv_float32mf2x4_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x4_t'} } */
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue