re PR target/66020 (FAIL: gcc.target/powerpc/ppc64-abi-2.c execution test)
PR target/66020 * gcc.target/powerpc/ppc64-abi-2.c (my_mcount): Rewrite. (gparms): Make volatile. From-SVN: r222850
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2 changed files with 81 additions and 79 deletions
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@ -1,3 +1,9 @@
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2015-05-06 Alan Modra <amodra@gmail.com>
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PR target/66020
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* gcc.target/powerpc/ppc64-abi-2.c (my_mcount): Rewrite.
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(gparms): Make volatile.
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2015-05-06 Richard Biener <rguenther@suse.de>
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PR tree-optimization/62283
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@ -24,72 +24,69 @@ typedef struct
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vector int vrs[12];
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} reg_parms_t;
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reg_parms_t gparms;
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volatile reg_parms_t gparms;
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/* _mcount call is done on Linux ppc64 early in the prologue.
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my_mcount will provide a entry point _mcount,
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which will save all register to gparms.
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Note that _mcount need to restore lr to original value,
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therefor use ctr to return.
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which will save all parameter registers to gparms.
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Note that _mcount needs to restore lr to original value,
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therefore use ctr to return.
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*/
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void __attribute__((no_instrument_function))
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my_mcount()
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extern void my_mcount (void) asm ("_mcount");
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void __attribute__((no_instrument_function, no_split_stack))
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my_mcount (void)
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{
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asm volatile (".type _mcount,@function\n\t"
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".globl _mcount\n\t"
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"_mcount:\n\t"
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"mflr 0\n\t"
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"mtctr 0\n\t"
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"ld 0,16(1)\n\t"
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asm volatile ("mflr 12\n\t"
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"mtctr 12\n\t"
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"mtlr 0\n\t"
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"ld 11,gparms@got(2)\n\t"
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"std 3,0(11)\n\t"
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"std 4,8(11)\n\t"
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"std 5,16(11)\n\t"
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"std 6,24(11)\n\t"
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"std 7,32(11)\n\t"
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"std 8,40(11)\n\t"
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"std 9,48(11)\n\t"
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"std 10,56(11)\n\t"
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"stfd 1,64(11)\n\t"
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"stfd 2,72(11)\n\t"
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"stfd 3,80(11)\n\t"
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"stfd 4,88(11)\n\t"
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"stfd 5,96(11)\n\t"
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"stfd 6,104(11)\n\t"
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"stfd 7,112(11)\n\t"
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"stfd 8,120(11)\n\t"
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"stfd 9,128(11)\n\t"
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"stfd 10,136(11)\n\t"
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"stfd 11,144(11)\n\t"
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"stfd 12,152(11)\n\t"
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"stfd 13,160(11)\n\t"
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"li 3,176\n\t"
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"stvx 2,3,11\n\t"
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"addi 3,3,16\n\t"
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"stvx 3,3,11\n\t"
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"addi 3,3,16\n\t"
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"stvx 4,3,11\n\t"
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"addi 3,3,16\n\t"
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"stvx 5,3,11\n\t"
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"addi 3,3,16\n\t"
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"stvx 6,3,11\n\t"
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"addi 3,3,16\n\t"
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"stvx 7,3,11\n\t"
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"addi 3,3,16\n\t"
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"stvx 8,3,11\n\t"
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"addi 3,3,16\n\t"
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"stvx 9,3,11\n\t"
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"addi 3,3,16\n\t"
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"stvx 10,3,11\n\t"
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"addi 3,3,16\n\t"
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"stvx 11,3,11\n\t"
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"addi 3,3,16\n\t"
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"stvx 12,3,11\n\t"
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"addi 3,3,16\n\t"
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"stvx 13,3,11\n\t"
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"ld 3,0(11)\n\t"
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"addis 12,2,gparms@got@ha\n\t"
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"ld 12,gparms@got@l(12)\n\t"
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"std 3,0(12)\n\t"
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"std 4,8(12)\n\t"
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"std 5,16(12)\n\t"
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"std 6,24(12)\n\t"
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"std 7,32(12)\n\t"
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"std 8,40(12)\n\t"
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"std 9,48(12)\n\t"
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"std 10,56(12)\n\t"
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"stfd 1,64(12)\n\t"
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"stfd 2,72(12)\n\t"
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"stfd 3,80(12)\n\t"
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"stfd 4,88(12)\n\t"
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"stfd 5,96(12)\n\t"
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"stfd 6,104(12)\n\t"
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"stfd 7,112(12)\n\t"
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"stfd 8,120(12)\n\t"
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"stfd 9,128(12)\n\t"
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"stfd 10,136(12)\n\t"
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"stfd 11,144(12)\n\t"
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"stfd 12,152(12)\n\t"
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"stfd 13,160(12)\n\t"
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"li 0,176\n\t"
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"stvx 2,12,0\n\t"
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"li 0,192\n\t"
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"stvx 3,12,0\n\t"
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"li 0,208\n\t"
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"stvx 4,12,0\n\t"
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"li 0,224\n\t"
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"stvx 5,12,0\n\t"
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"li 0,240\n\t"
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"stvx 6,12,0\n\t"
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"li 0,256\n\t"
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"stvx 7,12,0\n\t"
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"li 0,272\n\t"
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"stvx 8,12,0\n\t"
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"li 0,288\n\t"
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"stvx 9,12,0\n\t"
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"li 0,304\n\t"
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"stvx 10,12,0\n\t"
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"li 0,320\n\t"
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"stvx 11,12,0\n\t"
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"li 0,336\n\t"
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"stvx 12,12,0\n\t"
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"li 0,352\n\t"
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"stvx 13,12,0\n\t"
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"bctr");
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}
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@ -198,7 +195,7 @@ fcivv (char *s, int i, vector int v, vector int w)
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abort ();
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a = vec_add (v,w);
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if (!vec_all_eq (a, c))
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abort ();
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}
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@ -226,14 +223,14 @@ fcevv (char *s, ...)
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v = va_arg(arg, vector int);
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w = va_arg(arg, vector int);
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a = vec_add (v,w);
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if (!vec_all_eq (a, c))
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abort ();
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/* Go back one frame. */
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sp = __builtin_frame_address(0);
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sp = sp->backchain;
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if (sp->slot[2].l != MAKE_SLOT (1, 2)
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|| sp->slot[4].l != MAKE_SLOT (5, 6))
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abort();
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@ -265,17 +262,17 @@ fciievv (char *s, int i, int j, ...)
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if ((long) j != lparms.gprs[2])
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abort();
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v = va_arg(arg, vector int);
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w = va_arg(arg, vector int);
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a = vec_add (v,w);
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if (!vec_all_eq (a, c))
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abort ();
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sp = __builtin_frame_address(0);
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sp = sp->backchain;
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if (sp->slot[4].l != MAKE_SLOT (1, 2)
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|| sp->slot[6].l != MAKE_SLOT (5, 6))
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abort();
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@ -291,31 +288,31 @@ fcvevv (char *s, vector int x, ...)
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va_list arg;
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va_start (arg, x);
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v = va_arg(arg, vector int);
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w = va_arg(arg, vector int);
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a = vec_add (v,w);
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a = vec_add (a, x);
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if (!vec_all_eq (a, c))
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abort ();
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sp = __builtin_frame_address(0);
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sp = sp->backchain;
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if (sp->slot[4].l != MAKE_SLOT (1, 2)
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|| sp->slot[6].l != MAKE_SLOT (5, 6))
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abort();
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}
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int __attribute__((no_instrument_function, noinline))
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main1()
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{
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main1()
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{
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char *s = "vv";
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vector int v = {1, 2, 3, 4};
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vector int w = {5, 6, 7, 8};
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fcvi (s, v, 2);
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fcvv (s, v, w);
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fcivv (s, 1, v, w);
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return 0;
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}
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int __attribute__((no_instrument_function))
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int __attribute__((no_instrument_function))
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main()
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{
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/* Exit on systems without altivec. */
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abort ();
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a = vec_add (v,w);
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a = vec_add (a,x);
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a = vec_add (a,y);
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a = vec_add (a,x);
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a = vec_add (a,y);
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if (!vec_all_eq (a, c))
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abort ();
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v0.v = lparms.vrs[0];
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v1.v = lparms.vrs[1];
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v2.v = lparms.vrs[2];
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sp = __builtin_frame_address(0);
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sp = sp->backchain;
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if (sp->slot[8].l != v3.l[0])
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abort ();
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if (sp->slot[9].l != v3.l[1])
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abort ();
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}
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}
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