Adjust testcase for O2 vect.
Adjust code in check_vect_slp_store_usage to make it an exact pattern match of the corresponding testcases. These new target/xfail selectors are added as a temporary solution, and should be removed after real issue is fixed for Wstringop-overflow. gcc/ChangeLog: * doc/sourcebuild.texi (vect_slp_v4qi_store_unalign, vect_slp_v2hi_store_unalign, vect_slp_v4hi_store_unalign, vect_slp_v4si_store_unalign): Document efficient target. (vect_slp_v4qi_store_unalign_1, vect_slp_v8qi_store_unalign_1, vect_slp_v16qi_store_unalign_1): Ditto. (vect_slp_v2hi_store_align,vect_slp_v2qi_store_align, vect_slp_v2si_store_align, vect_slp_v4qi_store_align): Ditto. (struct_4char_block_move, struct_8char_block_move, struct_16char_block_move): Ditto. gcc/testsuite/ChangeLog: PR testsuite/102944 * c-c++-common/Wstringop-overflow-2.c: Adjust target/xfail selector. * gcc.dg/Warray-bounds-48.c: Ditto. * gcc.dg/Warray-bounds-51.c: Ditto. * gcc.dg/Warray-parameter-3.c: Ditto. * gcc.dg/Wstringop-overflow-14.c: Ditto. * gcc.dg/Wstringop-overflow-21.c: Ditto. * gcc.dg/Wstringop-overflow-68.c: Ditto * gcc.dg/Wstringop-overflow-76.c: Ditto * gcc.dg/Wzero-length-array-bounds-2.c: Ditto. * lib/target-supports.exp (vect_slp_v4qi_store_unalign): New efficient target. (vect_slp_v4qi_store_unalign_1): Ditto. (struct_4char_block_move): Ditto. (struct_8char_block_move): Ditto. (stryct_16char_block_move): Ditto. (vect_slp_v2hi_store_align): Ditto. (vect_slp_v2qi_store): Rename to .. (vect_slp_v2qi_store_align): .. this. (vect_slp_v4qi_store): Rename to .. (vect_slp_v4qi_store_align): .. This. (vect_slp_v8qi_store): Rename to .. (vect_slp_v8qi_store_unalign_1): .. This. (vect_slp_v16qi_store): Rename to .. (vect_slp_v16qi_store_unalign_1): .. This. (vect_slp_v2hi_store): Rename to .. (vect_slp_v2hi_store_unalign): .. This. (vect_slp_v4hi_store): Rename to .. (vect_slp_v4hi_store_unalign): This. (vect_slp_v2si_store): Rename to .. (vect_slp_v2si_store_align): .. This. (vect_slp_v4si_store): Rename to .. (vect_slp_v4si_store_unalign): Ditto. (check_vect_slp_aligned_store_usage): Rename to .. (check_vect_slp_store_usage): .. this and adjust code to make it an exact pattern match of corresponding testcase.
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commit
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11 changed files with 306 additions and 141 deletions
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@ -1846,37 +1846,59 @@ Target supports loop vectorization with partial vectors and
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Target supports loop vectorization with partial vectors and
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@code{vect-partial-vector-usage} is nonzero.
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@item vect_slp_v2qi_store
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@item vect_slp_v2qi_store_align
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Target supports vectorization of 2-byte char stores with 2-byte aligned
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address at plain @option{-O2}.
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@item vect_slp_v4qi_store
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@item vect_slp_v4qi_store_align
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Target supports vectorization of 4-byte char stores with 4-byte aligned
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address at plain @option{-O2}.
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@item vect_slp_v8qi_store
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Target supports vectorization of 8-byte char stores with 8-byte aligned
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address at plain @option{-O2}.
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@item vect_slp_v4qi_store_unalign
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Target supports vectorization of 4-byte char stores with unaligned address
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at plain @option{-O2}.
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@item vect_slp_v16qi_store
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Target supports vectorization of 16-byte char stores with 16-byte aligned
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address at plain @option{-O2}.
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@item struct_4char_block_move
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Target supports block move for 8-byte aligned 4-byte size struct initialization.
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@item vect_slp_v2hi_store
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@item vect_slp_v4qi_store_unalign_1
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Target supports vectorization of 4-byte char stores with unaligned address
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or store them with constant pool at plain @option{-O2}.
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@item struct_8char_block_move
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Target supports block move for 8-byte aligned 8-byte size struct initialization.
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@item vect_slp_v8qi_store_unalign_1
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Target supports vectorization of 8-byte char stores with unaligned address
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or store them with constant pool at plain @option{-O2}.
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@item struct_16char_block_move
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Target supports block move for 8-byte aligned 16-byte size struct
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initialization.
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@item vect_slp_v16qi_store_unalign_1
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Target supports vectorization of 16-byte char stores with unaligned address
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or store them with constant pool at plain @option{-O2}.
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@item vect_slp_v2hi_store_align
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Target supports vectorization of 4-byte short stores with 4-byte aligned
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address at plain @option{-O2}.
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addressat plain @option{-O2}.
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@item vect_slp_v4hi_store
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Target supports vectorization of 8-byte short stores with 8-byte aligned
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address at plain @option{-O2}.
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@item vect_slp_v2hi_store_unalign
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Target supports vectorization of 4-byte short stores with unaligned address
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at plain @option{-O2}.
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@item vect_slp_v2si_store
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Target supports vectorization of 8-byte int stores with 8-byte aligned
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address at plain @option{-O2}.
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@item vect_slp_v4hi_store_unalign
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Target supports vectorization of 8-byte short stores with unaligned address
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at plain @option{-O2}.
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@item vect_slp_v4si_store
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Target supports vectorization of 16-byte int stores with 16-byte aligned
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address at plain @option{-O2}.
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@item vect_slp_v2si_store_align
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Target supports vectorization of 8-byte int stores with 8-byte aligned address
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at plain @option{-O2}.
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@item vect_slp_v4si_store_unalign
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Target supports vectorization of 16-byte int stores with unaligned address
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at plain @option{-O2}.
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@end table
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@subsubsection Thread Local Storage attributes
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@ -190,7 +190,7 @@ void ga1__ (void)
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struct A1 a = { 1 };
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a.a[0] = 0;
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a.a[1] = 1; // { dg-warning "\\\[-Wstringop-overflow" }
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a.a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" "pr102462" { xfail { vect_slp_v2qi_store } } }
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a.a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" "pr102462" { xfail { vect_slp_v2qi_store_align } } }
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sink (&a);
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}
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@ -207,7 +207,7 @@ void ga1_0_ (void)
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struct A1 a = { 1, { } };
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a.a[0] = 0;
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a.a[1] = 1; // { dg-warning "\\\[-Wstringop-overflow" }
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a.a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" "pr102462" { xfail { vect_slp_v2qi_store } } }
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a.a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" "pr102462" { xfail { vect_slp_v2qi_store_align } } }
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sink (&a);
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}
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@ -221,10 +221,10 @@ void ga1_1 (void)
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a1_1.a[1] = 1; // { dg-warning "\\\[-Wstringop-overflow" }
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a1_1.a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" }
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struct A1 a = { 0, { 1 } }; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v4qi_store } } }
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struct A1 a = { 0, { 1 } }; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v4qi_store_align } } }
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a.a[0] = 0;
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a.a[1] = 1; // { dg-warning "\\\[-Wstringop-overflow" "" { xfail { vect_slp_v4qi_store } } }
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a.a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" "" { xfail { vect_slp_v4qi_store } } }
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a.a[1] = 1; // { dg-warning "\\\[-Wstringop-overflow" "" { xfail { vect_slp_v4qi_store_align } } }
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a.a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" "" { xfail { vect_slp_v4qi_store_align } } }
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sink (&a);
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}
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@ -289,7 +289,7 @@ void ga1i__ (void)
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struct A1i a = { 0 };
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a.a[0] = 0;
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a.a[1] = 1; // { dg-warning "\\\[-Wstringop-overflow" }
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a.a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" "pr102462" { xfail { vect_slp_v2qi_store } } }
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a.a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" "pr102462" { xfail { vect_slp_v2qi_store_align } } }
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sink (&a);
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}
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@ -306,7 +306,7 @@ void ga1i_0_ (void)
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struct A1 a = { 0, { } };
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a.a[0] = 0;
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a.a[1] = 1; // { dg-warning "\\\[-Wstringop-overflow" }
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a.a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" "pr102462" { xfail { vect_slp_v2qi_store } } }
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a.a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" "pr102462" { xfail { vect_slp_v2qi_store_align } } }
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sink (&a);
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}
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@ -320,10 +320,10 @@ void ga1i_1 (void)
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a1i_1.a[1] = 1; // { dg-warning "\\\[-Wstringop-overflow" }
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a1i_1.a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" }
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struct A1 a = { 0, { 1 } }; // { dg-warning "\\\[-Wstringop-overflow" "pr102462" { target { vect_slp_v4qi_store } } }
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struct A1 a = { 0, { 1 } }; // { dg-warning "\\\[-Wstringop-overflow" "pr102462" { target { vect_slp_v4qi_store_align } } }
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a.a[0] = 1;
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a.a[1] = 2; // { dg-warning "\\\[-Wstringop-overflow" "pr102462" { xfail { vect_slp_v4qi_store } } }
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a.a[2] = 3; // { dg-warning "\\\[-Wstringop-overflow" "pr102462" { xfail { vect_slp_v4qi_store } } }
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a.a[1] = 2; // { dg-warning "\\\[-Wstringop-overflow" "pr102462" { xfail { vect_slp_v4qi_store_align } } }
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a.a[2] = 3; // { dg-warning "\\\[-Wstringop-overflow" "pr102462" { xfail { vect_slp_v4qi_store_align } } }
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sink (&a);
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}
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@ -30,7 +30,7 @@ static void nowarn_ax_extern (struct AX *p)
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static void warn_ax_local_buf (struct AX *p)
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{
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p->ax[0] = 4; p->ax[1] = 5; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v2hi_store && { ! vect_slp_v4hi_store } } } }
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p->ax[0] = 4; p->ax[1] = 5; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v2hi_store_align && { ! vect_slp_v4hi_store_unalign } } } }
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p->ax[2] = 6; // { dg-warning "\\\[-Warray-bounds" }
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p->ax[3] = 7; // { dg-warning "\\\[-Warray-bounds" }
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static void warn_a0_local_buf (struct A0 *p)
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{
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p->a0[0] = 4; p->a0[1] = 5; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v2hi_store && { ! vect_slp_v4hi_store } } } }
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p->a0[0] = 4; p->a0[1] = 5; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v2hi_store_align && { ! vect_slp_v4hi_store_unalign } } } }
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p->a0[2] = 6; // { dg-warning "\\\[-Warray-bounds" }
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p->a0[3] = 7; // { dg-warning "\\\[-Warray-bounds" }
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@ -39,7 +39,7 @@ void test_struct_char_vla_location (void)
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} s;
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s.cvla[0] = __LINE__;
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s.cvla[nelts - 1] = 0; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v2qi_store } } }
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s.cvla[nelts - 1] = 0; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v2qi_store_align } } }
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s.cvla[nelts] = 0; // { dg-warning "\\\[-Warray-bounds" }
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sink (&s);
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@ -77,7 +77,7 @@ gia3 (int a[3])
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__attribute__ ((noipa)) void
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gcas3 (char a[static 3])
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{
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a[0] = 0; a[1] = 1; a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v4qi_store } } }
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a[0] = 0; a[1] = 1; a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v4qi_store_unalign } } }
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a[3] = 3; // { dg-warning "\\\[-Warray-bounds" }
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}
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void test_int16 (void)
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{
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char *p = a4 + 1;
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*(int16_t*)p = 0; // { dg-warning "writing 4 bytes into a region of size 3" "pr102706" { target { vect_slp_v2hi_store } } }
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*(int16_t*)(p + 2) = 0; // { dg-warning "writing 2 bytes into a region of size 1" "pr102706" { xfail { vect_slp_v2hi_store } } }
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*(int16_t*)p = 0; // { dg-warning "writing 4 bytes into a region of size 3" "pr102706" { target { vect_slp_v2hi_store_unalign } } }
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*(int16_t*)(p + 2) = 0; // { dg-warning "writing 2 bytes into a region of size 1" "pr102706" { xfail { vect_slp_v2hi_store_unalign } } }
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}
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{
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char a[3];
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struct S0 *p = (struct S0*)a;
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p->a = 0; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v4qi_store } } }
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p->a = 0; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v4qi_store_align } } }
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p->b[0] = 0;
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p->b[1] = 1; // { dg-bogus "\\\[-Wstringop-overflow" }
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p->b[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { xfail { vect_slp_v4qi_store } } }
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p->b[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { xfail { vect_slp_v4qi_store_align } } }
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p->b[i] = 2;
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sink (p);
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}
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{
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char a[3];
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struct Sx *p = (struct Sx*)a;
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p->a = 0; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v4qi_store } } }
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p->a = 0; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v4qi_store_align } } }
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p->b[0] = 0;
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p->b[1] = 1; // { dg-bogus "\\\[-Wstringop-overflow" }
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p->b[2] = 1; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { xfail { vect_slp_v4qi_store } } }
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p->b[2] = 1; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { xfail { vect_slp_v4qi_store_align } } }
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p->b[i] = 2;
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sink (p);
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}
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// MEM <vector(8) char> [(char *)&a7] = { 0, 1, 2, 3, 4, 5, 6, 7 };
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// MEM <vector(16) char> [(char *)&a15] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 };
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// and warning should be expected, refer to PR102722.
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*(AC4*)a2 = Ac4; // { dg-warning "writing 4 bytes into a region of size 2" "pr101475" { xfail { ! { vect_slp_v4qi_store } } } }
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*(AC4*)a3 = Ac4; // { dg-warning "writing 4 bytes into a region of size 3" "pr101475" { xfail { ! { vect_slp_v4qi_store } } } }
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*(AC8*)a4 = Ac8; // { dg-warning "writing 8 bytes into a region of size 4" "pr101475" { xfail { ! { vect_slp_v8qi_store } } } }
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*(AC8*)a7 = Ac8; // { dg-warning "writing 8 bytes into a region of size 7" "pr101475" { xfail { ! { vect_slp_v8qi_store } } } }
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*(AC16*)a15 = Ac16; // { dg-warning "writing 16 bytes into a region of size 15" "pr101475" { xfail { ! { vect_slp_v16qi_store } } } }
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*(AC4*)a2 = Ac4; // { dg-warning "writing 4 bytes into a region of size 2" "pr101475" { xfail { ! { vect_slp_v4qi_store_unalign_1 } } } }
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*(AC4*)a3 = Ac4; // { dg-warning "writing 4 bytes into a region of size 3" "pr101475" { xfail { ! { vect_slp_v4qi_store_unalign_1 } } } }
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*(AC8*)a4 = Ac8; // { dg-warning "writing 8 bytes into a region of size 4" "pr101475" { xfail { ! { vect_slp_v8qi_store_unalign_1 } } } }
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*(AC8*)a7 = Ac8; // { dg-warning "writing 8 bytes into a region of size 7" "pr101475" { xfail { ! { vect_slp_v8qi_store_unalign_1 } } } }
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*(AC16*)a15 = Ac16; // { dg-warning "writing 16 bytes into a region of size 15" "pr101475" { xfail { ! { vect_slp_v16qi_store_unalign_1 } } } }
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}
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void warn_aggr_decl (void)
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by its own warning independently of -Wstringop-overflow. */
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char *d = MAX (p, q);
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d[2] = 0; // { dg-warning "writing 4 bytes into a region of size 3" "pr102706" { target { vect_slp_v4qi_store } } }
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d[2] = 0; // { dg-warning "writing 4 bytes into a region of size 3" "pr102706" { target { vect_slp_v4qi_store_unalign } } }
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d[3] = 0;
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d[4] = 0;
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d[5] = 0; // { dg-warning "writing 1 byte into a region of size 0" "pr102706" { xfail { vect_slp_v4qi_store } } }
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d[5] = 0; // { dg-warning "writing 1 byte into a region of size 0" "pr102706" { xfail { vect_slp_v4qi_store_unalign } } }
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}
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char *q = b4 + i;
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char *d = MAX (p, q);
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d[3] = 0; // { dg-warning "writing 4 bytes into a region of size 3" "pr102706" { target { vect_slp_v4qi_store } } }
|
||||
d[3] = 0; // { dg-warning "writing 4 bytes into a region of size 3" "pr102706" { target { vect_slp_v4qi_store_unalign } } }
|
||||
d[4] = 0;
|
||||
d[5] = 0;
|
||||
d[6] = 0; // { dg-warning "writing 1 byte into a region of size 0" "pr102706" { xfail { vect_slp_v4qi_store } } }
|
||||
d[6] = 0; // { dg-warning "writing 1 byte into a region of size 0" "pr102706" { xfail { vect_slp_v4qi_store_unalign } } }
|
||||
}
|
||||
|
||||
|
||||
|
@ -83,7 +83,7 @@ struct A3_5
|
|||
{
|
||||
char a3[3]; // { dg-message "at offset 3 into destination object 'a3' of size 3" "pr??????" { xfail *-*-* } }
|
||||
// refer to pr102697 for xfail
|
||||
char a5[5]; // { dg-message "at offset 5 into destination object 'a5' of size 5" "note" { xfail { vect_slp_v4qi_store } } }
|
||||
char a5[5]; // { dg-message "at offset 5 into destination object 'a5' of size 5" "note" { xfail { vect_slp_v4qi_store_unalign } } }
|
||||
};
|
||||
|
||||
void max_A3_A5 (int i, struct A3_5 *pa3_5)
|
||||
|
@ -96,7 +96,7 @@ void max_A3_A5 (int i, struct A3_5 *pa3_5)
|
|||
d[2] = 0;
|
||||
d[3] = 0; // { dg-warning "writing 1 byte into a region of size 0" "pr??????" { xfail *-*-* } }
|
||||
d[4] = 0;
|
||||
d[5] = 0; // { dg-warning "writing 1 byte into a region of size 0" "pr102697" { xfail { vect_slp_v4qi_store } } }
|
||||
d[5] = 0; // { dg-warning "writing 1 byte into a region of size 0" "pr102697" { xfail { vect_slp_v4qi_store_unalign } } }
|
||||
}
|
||||
|
||||
|
||||
|
@ -104,7 +104,7 @@ struct B4_B6
|
|||
{
|
||||
char b4[4];
|
||||
// refer to pr102697 for xfail
|
||||
char b6[6]; // { dg-message "at offset \[^a-zA-Z\n\r\]*6\[^a-zA-Z0-9\]* into destination object 'b6' of size 6" "note" { xfail { vect_slp_v4qi_store } } }
|
||||
char b6[6]; // { dg-message "at offset \[^a-zA-Z\n\r\]*6\[^a-zA-Z0-9\]* into destination object 'b6' of size 6" "note" { xfail { vect_slp_v4qi_store_unalign } } }
|
||||
};
|
||||
|
||||
void max_B6_B4 (int i, struct B4_B6 *pb4_b6)
|
||||
|
@ -116,7 +116,7 @@ void max_B6_B4 (int i, struct B4_B6 *pb4_b6)
|
|||
d[3] = 0;
|
||||
d[4] = 0;
|
||||
d[5] = 0;
|
||||
d[6] = 0; // { dg-warning "writing 1 byte into a region of size 0" "pr102697" { xfail { vect_slp_v4qi_store } } }
|
||||
d[6] = 0; // { dg-warning "writing 1 byte into a region of size 0" "pr102697" { xfail { vect_slp_v4qi_store_unalign } } }
|
||||
}
|
||||
|
||||
|
||||
|
|
|
@ -87,7 +87,7 @@ void test_C_global_buf (void)
|
|||
p->b1.a[ 1].i = 0; // { dg-warning "\\\[-Wzero-length-bounds" }
|
||||
sink (p);
|
||||
|
||||
p->b2.a[ 0].i = 0; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v2si_store && { ! vect_slp_v4si_store } } } }
|
||||
p->b2.a[ 0].i = 0; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v2si_store_align && { ! vect_slp_v4si_store_unalign } } } }
|
||||
p->b2.a[ 1].i = 0;
|
||||
p->b2.a[ 2].i = 0; // { dg-warning "\\\[-Warray-bounds" }
|
||||
p->b2.a[ 3].i = 0; // { dg-warning "\\\[-Warray-bounds" }
|
||||
|
|
|
@ -7584,95 +7584,149 @@ proc check_effective_target_vect_element_align_preferred { } {
|
|||
# Return zero if the desirable pattern isn't found.
|
||||
# It's used by Warray-bounds/Wstringop-overflow testcases which are
|
||||
# regressed by O2 vectorization, refer to PR102697/PR102462/PR102706
|
||||
proc check_vect_slp_aligned_store_usage { pattern macro } {
|
||||
proc check_vect_slp_store_usage { pattern macro } {
|
||||
global tool
|
||||
|
||||
set result [check_compile slp_aligned_store_usage assembly {
|
||||
char a[16] __attribute__ ((aligned (16)));
|
||||
short b[4] __attribute__((aligned(8)));
|
||||
int c[4] __attribute__((aligned(16)));
|
||||
#ifdef TEST_V8QI
|
||||
void
|
||||
foo ()
|
||||
{
|
||||
a[0] = 0;
|
||||
a[1] = 1;
|
||||
a[2] = 2;
|
||||
a[3] = 3;
|
||||
a[4] = 4;
|
||||
a[5] = 5;
|
||||
a[6] = 6;
|
||||
a[7] = 7;
|
||||
}
|
||||
#elif TEST_V16QI
|
||||
extern void sink (void* );
|
||||
#define Ac8 (AC8){ 0, 1, 2, 3, 4, 5, 6, 7 }
|
||||
#define Ac16 (AC16){ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }
|
||||
#ifdef TEST_V16QI
|
||||
typedef struct AC16 { char a[16]; } AC16;
|
||||
extern char a16[16];
|
||||
void
|
||||
foo1 ()
|
||||
{
|
||||
a[0] = 0;
|
||||
a[1] = 1;
|
||||
a[2] = 2;
|
||||
a[3] = 3;
|
||||
a[4] = 4;
|
||||
a[5] = 5;
|
||||
a[6] = 6;
|
||||
a[7] = 7;
|
||||
a[8] = 8;
|
||||
a[9] = 9;
|
||||
a[10] = 10;
|
||||
a[11] = 11;
|
||||
a[12] = 12;
|
||||
a[13] = 13;
|
||||
a[14] = 14;
|
||||
a[15] = 15;
|
||||
*(AC16*)a16 = Ac16;
|
||||
}
|
||||
#elif TEST_V8QI
|
||||
typedef struct AC8 { char a[8]; } AC8;
|
||||
extern char a8[8];
|
||||
void
|
||||
foo ()
|
||||
{
|
||||
*(AC8*)a8 = Ac8;
|
||||
}
|
||||
#elif TEST_V4QI
|
||||
struct A1
|
||||
{
|
||||
char n;
|
||||
char a[3];
|
||||
};
|
||||
|
||||
extern void sink (void*);
|
||||
void
|
||||
foo2 ()
|
||||
{
|
||||
a[0] = 0;
|
||||
a[1] = 1;
|
||||
a[2] = 2;
|
||||
a[3] = 3;
|
||||
struct A1 a = { 0, { } };
|
||||
a.a[0] = 3;
|
||||
a.a[1] = 4;
|
||||
a.a[2] = 5;
|
||||
sink (&a);
|
||||
}
|
||||
#elif TEST_V4QI_2
|
||||
extern char p[4];
|
||||
void
|
||||
foo2_2 ()
|
||||
{
|
||||
p[0] = 0;
|
||||
p[1] = 1;
|
||||
p[2] = 2;
|
||||
p[3] = 3;
|
||||
}
|
||||
#elif TEST_V4QI_3
|
||||
#define Ac4 (AC4){ 0, 1, 2, 3 }
|
||||
typedef struct AC4 { char a[4]; } AC4;
|
||||
extern char a[4];
|
||||
void
|
||||
foo ()
|
||||
{
|
||||
*(AC4*)a = Ac4;
|
||||
}
|
||||
#elif TEST_V2QI
|
||||
struct A2
|
||||
{
|
||||
char a[2];
|
||||
};
|
||||
void
|
||||
foo3 ()
|
||||
{
|
||||
a[0] = 0;
|
||||
a[1] = 1;
|
||||
struct A2 a;
|
||||
a.a[0] = 3;
|
||||
a.a[1] = 4;
|
||||
sink (&a);
|
||||
}
|
||||
#elif TEST_V4HI
|
||||
struct Ax
|
||||
{
|
||||
int n;
|
||||
short a[4];
|
||||
};
|
||||
void
|
||||
foo5 (struct Ax *p)
|
||||
{
|
||||
p->a[0] = 0;
|
||||
p->a[1] = 1;
|
||||
p->a[2] = 2;
|
||||
p->a[3] = 3;
|
||||
}
|
||||
#elif TEST_V2HI
|
||||
extern char b[4];
|
||||
void
|
||||
foo4 ()
|
||||
{
|
||||
b[0] = 0;
|
||||
b[1] = 1;
|
||||
*(short*) b = 0;
|
||||
*(short*) (b + 2) = 1;
|
||||
}
|
||||
#elif TEST_V4HI
|
||||
void
|
||||
foo5 ()
|
||||
#elif TEST_V2HI_2
|
||||
struct Ax
|
||||
{
|
||||
b[0] = 0;
|
||||
b[1] = 1;
|
||||
b[2] = 2;
|
||||
b[3] = 3;
|
||||
int n;
|
||||
short a[2];
|
||||
};
|
||||
void
|
||||
foo4_2 (struct Ax *p)
|
||||
{
|
||||
p->a[0] = 0;
|
||||
p->a[1] = 1;
|
||||
}
|
||||
#elif TEST_V2SI
|
||||
#elif TEST_V4SI
|
||||
struct A { int i; };
|
||||
struct B { int j; struct A a[4]; };
|
||||
|
||||
struct C
|
||||
{
|
||||
struct B b1;
|
||||
struct B b2;
|
||||
};
|
||||
char cbuf2[2 * sizeof (struct C)] = { };
|
||||
void
|
||||
foo6 ()
|
||||
{
|
||||
c[0] = 0;
|
||||
c[1] = 1;
|
||||
struct C *p = (struct C*)&cbuf2;
|
||||
p->b2.a[0].i = 0;
|
||||
p->b2.a[1].i = 0;
|
||||
p->b2.a[2].i = 0;
|
||||
p->b2.a[3].i = 0;
|
||||
}
|
||||
#elif TEST_V4SI
|
||||
void
|
||||
foo7 ()
|
||||
#elif TEST_V2SI
|
||||
struct A { int i; };
|
||||
struct B { int j; struct A a[2]; };
|
||||
|
||||
struct C
|
||||
{
|
||||
c[0] = 0;
|
||||
c[1] = 1;
|
||||
c[2] = 2;
|
||||
c[3] = 3;
|
||||
struct B b1;
|
||||
struct B b2;
|
||||
};
|
||||
char cbuf2[2 * sizeof (struct C)] = { };
|
||||
void
|
||||
foo6 ()
|
||||
{
|
||||
struct C *p = (struct C*)&cbuf2;
|
||||
p->b2.a[0].i = 0;
|
||||
p->b2.a[1].i = 0;
|
||||
}
|
||||
|
||||
#endif
|
||||
} "-O2 -fopt-info-all -D$macro" ]
|
||||
|
||||
|
@ -7691,75 +7745,164 @@ proc check_vect_slp_aligned_store_usage { pattern macro } {
|
|||
|
||||
# Return the true if target support vectorization of 2-byte char stores
|
||||
# with 2-byte aligned address at plain O2.
|
||||
proc check_effective_target_vect_slp_v2qi_store { } {
|
||||
# NB: This target should be removed after real issues are fixed for
|
||||
# -Wstringop-overflow with O2 vect. Be careful if you want to reuse
|
||||
# this target since tests in check_vect_slp_store_usage
|
||||
# is the exact match of relative testcases
|
||||
proc check_effective_target_vect_slp_v2qi_store_align { } {
|
||||
set pattern {add new stmt: MEM <vector\(2\) char>}
|
||||
set macro "TEST_V2QI"
|
||||
return [check_cached_effective_target vect_slp_v2qi_store {
|
||||
expr [check_vect_slp_aligned_store_usage $pattern $macro] }]
|
||||
return [check_cached_effective_target vect_slp_v2qi_store_align {
|
||||
expr [check_vect_slp_store_usage $pattern $macro] }]
|
||||
|
||||
}
|
||||
|
||||
# Return the true if target support vectorization of 4-byte char stores
|
||||
# with 4-byte aligned address at plain O2.
|
||||
proc check_effective_target_vect_slp_v4qi_store { } {
|
||||
# NB: This target should be removed after real issues are fixed for
|
||||
# -Wstringop-overflow with O2 vect. Be careful if you want to reuse
|
||||
# this target since tests in check_vect_slp_store_usage
|
||||
# is the exact match of relative testcases
|
||||
proc check_effective_target_vect_slp_v4qi_store_align { } {
|
||||
set pattern {add new stmt: MEM <vector\(4\) char>}
|
||||
set macro "TEST_V4QI"
|
||||
return [check_cached_effective_target vect_slp_v4qi_store {
|
||||
expr [check_vect_slp_aligned_store_usage $pattern $macro ] }]
|
||||
return [check_cached_effective_target vect_slp_v4qi_store_align {
|
||||
expr [check_vect_slp_store_usage $pattern $macro ] }]
|
||||
}
|
||||
|
||||
# Return the true if target support vectorization of 4-byte char stores
|
||||
# with unaligned address at plain O2.
|
||||
proc check_effective_target_vect_slp_v4qi_store_unalign { } {
|
||||
set pattern {add new stmt: MEM <vector\(4\) char>}
|
||||
set macro "TEST_V4QI_2"
|
||||
return [check_cached_effective_target vect_slp_v4qi_store_unalign {
|
||||
expr [check_vect_slp_store_usage $pattern $macro ] }]
|
||||
}
|
||||
|
||||
# Return the true if target support block move for
|
||||
# 8-byte aligned 4-byte size struct initialization.
|
||||
proc check_effective_target_struct_4char_block_move { } {
|
||||
set pattern {not vectorized: more than one data ref in stmt:}
|
||||
set macro "TEST_V4QI_3"
|
||||
return [check_cached_effective_target struct_4char_block_move {
|
||||
expr [check_vect_slp_store_usage $pattern $macro ] }]
|
||||
}
|
||||
|
||||
# Return the true if target support vectorization of 4-byte char stores
|
||||
# with unaligned address or store them with a constant pool at plain O2.
|
||||
proc check_effective_target_vect_slp_v4qi_store_unalign_1 { } {
|
||||
set pattern {add new stmt: MEM <vector\(4\) char>}
|
||||
set macro "TEST_V4QI_3"
|
||||
return [check_cached_effective_target vect_slp_v4qi_store_unalign_1 {
|
||||
expr { [check_vect_slp_store_usage $pattern $macro ]
|
||||
|| [check_effective_target_struct_4char_block_move] } }]
|
||||
}
|
||||
|
||||
# Return the true if target support block move for
|
||||
# 8-byte aligned 8-byte size struct initialization.
|
||||
proc check_effective_target_struct_8char_block_move { } {
|
||||
set pattern {not vectorized: more than one data ref in stmt:}
|
||||
set macro "TEST_V8QI"
|
||||
return [check_cached_effective_target struct_8char_block_move {
|
||||
expr [check_vect_slp_store_usage $pattern $macro ] }]
|
||||
}
|
||||
|
||||
# Return the true if target support vectorization of 8-byte char stores
|
||||
# with 8-byte aligned address at plain O2.
|
||||
proc check_effective_target_vect_slp_v8qi_store { } {
|
||||
# with unaligned address or store them with a constant pool at plain O2.
|
||||
# NB: This target should be removed after real issues are fixed for
|
||||
# -Wstringop-overflow with O2 vect. Be careful if you want to reuse
|
||||
# this target since tests in check_vect_slp_store_usage
|
||||
# is the exact match of relative testcases
|
||||
proc check_effective_target_vect_slp_v8qi_store_unalign_1 { } {
|
||||
set pattern {add new stmt: MEM <vector\(8\) char>}
|
||||
set macro "TEST_V8QI"
|
||||
return [check_cached_effective_target vect_slp_v8qi_store {
|
||||
expr [check_vect_slp_aligned_store_usage $pattern $macro ] }]
|
||||
return [check_cached_effective_target vect_slp_v8qi_store_unalign_1 {
|
||||
expr { [check_vect_slp_store_usage $pattern $macro ]
|
||||
|| [check_effective_target_struct_8char_block_move] } }]
|
||||
}
|
||||
|
||||
# Return the true if target support block move for
|
||||
# 8-byte aligned 16-byte size struct initialization.
|
||||
proc check_effective_target_struct_16char_block_move { } {
|
||||
set pattern {not vectorized: more than one data ref in stmt:}
|
||||
set macro "TEST_V16QI"
|
||||
return [check_cached_effective_target struct_16char_block_move {
|
||||
expr [check_vect_slp_store_usage $pattern $macro ] }]
|
||||
}
|
||||
|
||||
# Return the true if target support vectorization of 16-byte char stores
|
||||
# with 16-byte aligned address at plain O2.
|
||||
proc check_effective_target_vect_slp_v16qi_store { } {
|
||||
# with unaligned address or store them with a constant pool at plain O2.
|
||||
# NB: This target should be removed after real issues are fixed for
|
||||
# -Wstringop-overflow with O2 vect. Be careful if you want to reuse
|
||||
# this target since tests in check_vect_slp_store_usage
|
||||
# is the exact match of relative testcases
|
||||
proc check_effective_target_vect_slp_v16qi_store_unalign_1 { } {
|
||||
set pattern {add new stmt: MEM <vector\(16\) char>}
|
||||
set macro "TEST_V16QI"
|
||||
return [check_cached_effective_target vect_slp_v16qi_store {
|
||||
expr [check_vect_slp_aligned_store_usage $pattern $macro ] }]
|
||||
return [check_cached_effective_target vect_slp_v16qi_store_unalign_1 {
|
||||
expr { [check_vect_slp_store_usage $pattern $macro ]
|
||||
|| [check_effective_target_struct_16char_block_move] } }]
|
||||
}
|
||||
|
||||
# Return the true if target support vectorization of 4-byte short stores
|
||||
# with unaligned address at plain O2.
|
||||
# NB: This target should be removed after real issues are fixed for
|
||||
# -Wstringop-overflow with O2 vect. Be careful if you want to reuse
|
||||
# this target since tests in check_vect_slp_store_usage
|
||||
# is the exact match of relative testcases
|
||||
proc check_effective_target_vect_slp_v2hi_store_unalign { } {
|
||||
set pattern {add new stmt: MEM <vector\(2\) short int>}
|
||||
set macro "TEST_V2HI"
|
||||
return [check_cached_effective_target vect_slp_v2hi_store_unalign {
|
||||
expr [check_vect_slp_store_usage $pattern $macro ] }]
|
||||
}
|
||||
|
||||
# Return the true if target support vectorization of 4-byte short stores
|
||||
# with 4-byte aligned address at plain O2.
|
||||
proc check_effective_target_vect_slp_v2hi_store { } {
|
||||
proc check_effective_target_vect_slp_v2hi_store_align { } {
|
||||
set pattern {add new stmt: MEM <vector\(2\) short int>}
|
||||
set macro "TEST_V2HI"
|
||||
return [check_cached_effective_target vect_slp_v2hi_store {
|
||||
expr [check_vect_slp_aligned_store_usage $pattern $macro ] }]
|
||||
set macro "TEST_V2HI_2"
|
||||
return [check_cached_effective_target vect_slp_v2hi_store_align {
|
||||
expr [check_vect_slp_store_usage $pattern $macro ] }]
|
||||
}
|
||||
|
||||
# Return the true if target support vectorization of 8-byte short stores
|
||||
# with 8-byte aligned address at plain O2.
|
||||
proc check_effective_target_vect_slp_v4hi_store { } {
|
||||
# with unaligned address at plain O2.
|
||||
# NB: This target should be removed after real issues are fixed for
|
||||
# -Wstringop-overflow with O2 vect. Be careful if you want to reuse
|
||||
# this target since tests in check_vect_slp_store_usage
|
||||
# is the exact match of relative testcases
|
||||
proc check_effective_target_vect_slp_v4hi_store_unalign { } {
|
||||
set pattern {add new stmt: MEM <vector\(4\) short int>}
|
||||
set macro "TEST_V4HI"
|
||||
return [check_cached_effective_target vect_slp_v4hi_store {
|
||||
expr [check_vect_slp_aligned_store_usage $pattern $macro ] }]
|
||||
return [check_cached_effective_target vect_slp_v4hi_store_unalign {
|
||||
expr [check_vect_slp_store_usage $pattern $macro ] }]
|
||||
}
|
||||
|
||||
# Return the true if target support vectorization of 8-byte int stores
|
||||
# with 8-byte aligned address at plain O2.
|
||||
proc check_effective_target_vect_slp_v2si_store { } {
|
||||
# NB: This target should be removed after real issues are fixed for
|
||||
# -Wstringop-overflow with O2 vect. Be careful if you want to reuse
|
||||
# this target since tests in check_vect_slp_store_usage
|
||||
# is the exact match of relative testcases
|
||||
proc check_effective_target_vect_slp_v2si_store_align { } {
|
||||
set pattern {add new stmt: MEM <vector\(2\) int>}
|
||||
set macro "TEST_V2SI"
|
||||
return [check_cached_effective_target vect_slp_v2si_store {
|
||||
expr [check_vect_slp_aligned_store_usage $pattern $macro ] }]
|
||||
return [check_cached_effective_target vect_slp_v2si_store_align {
|
||||
expr [check_vect_slp_store_usage $pattern $macro ] }]
|
||||
}
|
||||
|
||||
# Return the true if target support vectorization of 16-byte int stores
|
||||
# with 16-byte aligned address at plain O2.
|
||||
proc check_effective_target_vect_slp_v4si_store { } {
|
||||
# with unaligned address at plain O2.
|
||||
# NB: This target should be removed after real issues are fixed for
|
||||
# -Wstringop-overflow with O2 vect. Be careful if you want to reuse
|
||||
# this target since tests in check_vect_slp_store_usage
|
||||
# is the exact match of relative testcases
|
||||
proc check_effective_target_vect_slp_v4si_store_unalign { } {
|
||||
set pattern {add new stmt: MEM <vector\(4\) int>}
|
||||
set macro "TEST_V4SI"
|
||||
return [check_cached_effective_target vect_slp_v4si_store {
|
||||
expr [check_vect_slp_aligned_store_usage $pattern $macro ] }]
|
||||
return [check_cached_effective_target vect_slp_v4si_store_unalign {
|
||||
expr [check_vect_slp_store_usage $pattern $macro ] }]
|
||||
}
|
||||
|
||||
# Return 1 if we can align stack data to the preferred vector alignment.
|
||||
|
|
Loading…
Add table
Reference in a new issue