Add support for MIPS r3 and r5.
2014-06-03 Andrew Bennett <andrew.bennett@imgtec.com> * config/mips/mips-cpus.def: Add mips32r3, mips32r5, mips64r3 and mips64r5. * config/mips/mips-tables.opt: Regenerate. * config/mips/mips.c (mips_compute_frame_info): Changed if statement to use mips_isa_rev rather than ISA_MIPS32R2. * config/mips/mips.h (ISA_MIPS32R3): New define. (ISA_MIPS32R5): New define. (ISA_MIPS64R3): New define. (ISA_MIPS64R5): New define. (TARGET_CPU_CPP_BUILTINS): Added support for ISA_MIPS32R3, ISA_MIPS32R5, ISA_MIPS64R3 and ISA_MIPS64R5. (MIPS_ISA_LEVEL_SPEC): Added support for mips32r3, mips32r5, mips64r3 and mips64r5. (MIPS_ISA_SYNCI_SPEC): Likewise. (ISA_HAS_64BIT_REGS): Added ISA_MIPS64R3 and ISA_MIPS64R5. (LINK_SPEC): Added mips32r3 and mips32r5. * config/mips/t-isa3264 (MULTILIB_MATCHES): Map mips32r3 and mips32r5 to mips32r2; and mips64r3 and mips64r5 to mips64r2. * config/mips/t-mti-elf (MULTILIB_MATCHES): Likewise. * config/mips/t-mti-linux (MULTILIB_MATCHES): Likewise. * config/mips/t-sde (MULTILIB_MATCHES): Likewise. * config/mips/t-sdemtk (MULTILIB_MATCHES): New define. * doc/invoke.texi: Document mips32r3, mips32r5, mips64r3 and mips64r5. From-SVN: r211173
This commit is contained in:
Andrew Bennett
Andrew Bennett
parent
35773f5380
commit
2b3bd04055
11 changed files with 310 additions and 207 deletions
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@ -1,3 +1,29 @@
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2014-06-03 Andrew Bennett <andrew.bennett@imgtec.com>
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* config/mips/mips-cpus.def: Add mips32r3, mips32r5, mips64r3 and
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mips64r5.
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* config/mips/mips-tables.opt: Regenerate.
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* config/mips/mips.c (mips_compute_frame_info): Changed if statement
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to use mips_isa_rev rather than ISA_MIPS32R2.
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* config/mips/mips.h (ISA_MIPS32R3): New define.
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(ISA_MIPS32R5): New define.
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(ISA_MIPS64R3): New define.
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(ISA_MIPS64R5): New define.
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(TARGET_CPU_CPP_BUILTINS): Added support for ISA_MIPS32R3, ISA_MIPS32R5,
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ISA_MIPS64R3 and ISA_MIPS64R5.
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(MIPS_ISA_LEVEL_SPEC): Added support for mips32r3, mips32r5, mips64r3
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and mips64r5.
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(MIPS_ISA_SYNCI_SPEC): Likewise.
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(ISA_HAS_64BIT_REGS): Added ISA_MIPS64R3 and ISA_MIPS64R5.
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(LINK_SPEC): Added mips32r3 and mips32r5.
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* config/mips/t-isa3264 (MULTILIB_MATCHES): Map mips32r3 and mips32r5
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to mips32r2; and mips64r3 and mips64r5 to mips64r2.
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* config/mips/t-mti-elf (MULTILIB_MATCHES): Likewise.
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* config/mips/t-mti-linux (MULTILIB_MATCHES): Likewise.
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* config/mips/t-sde (MULTILIB_MATCHES): Likewise.
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* config/mips/t-sdemtk (MULTILIB_MATCHES): New define.
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* doc/invoke.texi: Document mips32r3, mips32r5, mips64r3 and mips64r5.
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2014-06-03 Andrew Bennett <andrew.bennett@imgtec.com>
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* doc/invoke.texi: Document -mxpa and -mno-xpa MIPS command line
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@ -44,9 +44,17 @@ MIPS_CPU ("mips4", PROCESSOR_R8000, 4, 0)
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isn't tuned to a specific processor. */
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MIPS_CPU ("mips32", PROCESSOR_4KC, 32, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("mips32r2", PROCESSOR_74KF2_1, 33, PTF_AVOID_BRANCHLIKELY)
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/* mips32r3 is micromips hense why it uses the M4K processor.
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mips32r5 should use the p5600 processor, but there is no definition
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for this yet, so in the short term we will use the same processor entry
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as mips32r2. */
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MIPS_CPU ("mips32r3", PROCESSOR_M4K, 34, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("mips32r5", PROCESSOR_74KF2_1, 36, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("mips64", PROCESSOR_5KC, 64, PTF_AVOID_BRANCHLIKELY)
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/* ??? For now just tune the generic MIPS64r2 for 5KC as well. */
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/* ??? For now just tune the generic MIPS64r2 and above for 5KC as well. */
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MIPS_CPU ("mips64r2", PROCESSOR_5KC, 65, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("mips64r3", PROCESSOR_5KC, 66, PTF_AVOID_BRANCHLIKELY)
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MIPS_CPU ("mips64r5", PROCESSOR_5KC, 68, PTF_AVOID_BRANCHLIKELY)
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/* MIPS I processors. */
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MIPS_CPU ("r3000", PROCESSOR_R3000, 1, 0)
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@ -70,575 +70,599 @@ EnumValue
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Enum(mips_mips_opt_value) String(32r2) Value(5)
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EnumValue
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Enum(mips_arch_opt_value) String(mips64) Value(6) Canonical
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Enum(mips_arch_opt_value) String(mips32r3) Value(6) Canonical
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EnumValue
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Enum(mips_mips_opt_value) String(64) Value(6)
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Enum(mips_mips_opt_value) String(32r3) Value(6)
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EnumValue
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Enum(mips_arch_opt_value) String(mips64r2) Value(7) Canonical
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Enum(mips_arch_opt_value) String(mips32r5) Value(7) Canonical
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EnumValue
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Enum(mips_mips_opt_value) String(64r2) Value(7)
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Enum(mips_mips_opt_value) String(32r5) Value(7)
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EnumValue
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Enum(mips_arch_opt_value) String(r3000) Value(8) Canonical
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Enum(mips_arch_opt_value) String(mips64) Value(8) Canonical
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EnumValue
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Enum(mips_arch_opt_value) String(r3k) Value(8)
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Enum(mips_mips_opt_value) String(64) Value(8)
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EnumValue
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Enum(mips_arch_opt_value) String(3000) Value(8)
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Enum(mips_arch_opt_value) String(mips64r2) Value(9) Canonical
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EnumValue
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Enum(mips_arch_opt_value) String(3k) Value(8)
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Enum(mips_mips_opt_value) String(64r2) Value(9)
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EnumValue
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Enum(mips_arch_opt_value) String(r2000) Value(9) Canonical
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Enum(mips_arch_opt_value) String(mips64r3) Value(10) Canonical
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EnumValue
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Enum(mips_arch_opt_value) String(r2k) Value(9)
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Enum(mips_mips_opt_value) String(64r3) Value(10)
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EnumValue
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Enum(mips_arch_opt_value) String(2000) Value(9)
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Enum(mips_arch_opt_value) String(mips64r5) Value(11) Canonical
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EnumValue
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Enum(mips_arch_opt_value) String(2k) Value(9)
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Enum(mips_mips_opt_value) String(64r5) Value(11)
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EnumValue
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Enum(mips_arch_opt_value) String(r3900) Value(10) Canonical
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Enum(mips_arch_opt_value) String(r3000) Value(12) Canonical
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EnumValue
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Enum(mips_arch_opt_value) String(3900) Value(10)
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Enum(mips_arch_opt_value) String(r3k) Value(12)
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EnumValue
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Enum(mips_arch_opt_value) String(r6000) Value(11) Canonical
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Enum(mips_arch_opt_value) String(3000) Value(12)
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EnumValue
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Enum(mips_arch_opt_value) String(r6k) Value(11)
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Enum(mips_arch_opt_value) String(3k) Value(12)
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EnumValue
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Enum(mips_arch_opt_value) String(6000) Value(11)
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Enum(mips_arch_opt_value) String(r2000) Value(13) Canonical
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EnumValue
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Enum(mips_arch_opt_value) String(6k) Value(11)
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Enum(mips_arch_opt_value) String(r2k) Value(13)
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EnumValue
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Enum(mips_arch_opt_value) String(r4000) Value(12) Canonical
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Enum(mips_arch_opt_value) String(2000) Value(13)
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EnumValue
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Enum(mips_arch_opt_value) String(r4k) Value(12)
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Enum(mips_arch_opt_value) String(2k) Value(13)
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EnumValue
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Enum(mips_arch_opt_value) String(4000) Value(12)
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Enum(mips_arch_opt_value) String(r3900) Value(14) Canonical
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EnumValue
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Enum(mips_arch_opt_value) String(4k) Value(12)
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Enum(mips_arch_opt_value) String(3900) Value(14)
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EnumValue
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Enum(mips_arch_opt_value) String(vr4100) Value(13) Canonical
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Enum(mips_arch_opt_value) String(r6000) Value(15) Canonical
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EnumValue
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Enum(mips_arch_opt_value) String(4100) Value(13)
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Enum(mips_arch_opt_value) String(r6k) Value(15)
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EnumValue
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Enum(mips_arch_opt_value) String(r4100) Value(13)
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Enum(mips_arch_opt_value) String(6000) Value(15)
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EnumValue
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Enum(mips_arch_opt_value) String(vr4111) Value(14) Canonical
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Enum(mips_arch_opt_value) String(6k) Value(15)
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EnumValue
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Enum(mips_arch_opt_value) String(4111) Value(14)
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Enum(mips_arch_opt_value) String(r4000) Value(16) Canonical
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EnumValue
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Enum(mips_arch_opt_value) String(r4111) Value(14)
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Enum(mips_arch_opt_value) String(r4k) Value(16)
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EnumValue
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Enum(mips_arch_opt_value) String(vr4120) Value(15) Canonical
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Enum(mips_arch_opt_value) String(4000) Value(16)
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EnumValue
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Enum(mips_arch_opt_value) String(4120) Value(15)
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Enum(mips_arch_opt_value) String(4k) Value(16)
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EnumValue
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Enum(mips_arch_opt_value) String(r4120) Value(15)
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Enum(mips_arch_opt_value) String(vr4100) Value(17) Canonical
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EnumValue
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Enum(mips_arch_opt_value) String(vr4130) Value(16) Canonical
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Enum(mips_arch_opt_value) String(4100) Value(17)
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EnumValue
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Enum(mips_arch_opt_value) String(4130) Value(16)
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Enum(mips_arch_opt_value) String(r4100) Value(17)
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EnumValue
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Enum(mips_arch_opt_value) String(r4130) Value(16)
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Enum(mips_arch_opt_value) String(vr4111) Value(18) Canonical
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EnumValue
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Enum(mips_arch_opt_value) String(vr4300) Value(17) Canonical
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Enum(mips_arch_opt_value) String(4111) Value(18)
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EnumValue
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Enum(mips_arch_opt_value) String(4300) Value(17)
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Enum(mips_arch_opt_value) String(r4111) Value(18)
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EnumValue
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Enum(mips_arch_opt_value) String(r4300) Value(17)
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Enum(mips_arch_opt_value) String(vr4120) Value(19) Canonical
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EnumValue
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Enum(mips_arch_opt_value) String(r4400) Value(18) Canonical
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Enum(mips_arch_opt_value) String(4120) Value(19)
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EnumValue
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Enum(mips_arch_opt_value) String(4400) Value(18)
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Enum(mips_arch_opt_value) String(r4120) Value(19)
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EnumValue
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Enum(mips_arch_opt_value) String(r4600) Value(19) Canonical
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Enum(mips_arch_opt_value) String(vr4130) Value(20) Canonical
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EnumValue
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Enum(mips_arch_opt_value) String(4600) Value(19)
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Enum(mips_arch_opt_value) String(4130) Value(20)
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EnumValue
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Enum(mips_arch_opt_value) String(orion) Value(20) Canonical
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Enum(mips_arch_opt_value) String(r4130) Value(20)
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EnumValue
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Enum(mips_arch_opt_value) String(r4650) Value(21) Canonical
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Enum(mips_arch_opt_value) String(vr4300) Value(21) Canonical
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EnumValue
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Enum(mips_arch_opt_value) String(4650) Value(21)
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Enum(mips_arch_opt_value) String(4300) Value(21)
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EnumValue
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Enum(mips_arch_opt_value) String(r4700) Value(22) Canonical
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Enum(mips_arch_opt_value) String(r4300) Value(21)
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EnumValue
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Enum(mips_arch_opt_value) String(4700) Value(22)
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Enum(mips_arch_opt_value) String(r4400) Value(22) Canonical
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EnumValue
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Enum(mips_arch_opt_value) String(r5900) Value(23) Canonical
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Enum(mips_arch_opt_value) String(4400) Value(22)
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EnumValue
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Enum(mips_arch_opt_value) String(5900) Value(23)
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Enum(mips_arch_opt_value) String(r4600) Value(23) Canonical
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EnumValue
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Enum(mips_arch_opt_value) String(loongson2e) Value(24) Canonical
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Enum(mips_arch_opt_value) String(4600) Value(23)
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EnumValue
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Enum(mips_arch_opt_value) String(loongson2f) Value(25) Canonical
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Enum(mips_arch_opt_value) String(orion) Value(24) Canonical
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EnumValue
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Enum(mips_arch_opt_value) String(r8000) Value(26) Canonical
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Enum(mips_arch_opt_value) String(r4650) Value(25) Canonical
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EnumValue
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Enum(mips_arch_opt_value) String(r8k) Value(26)
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Enum(mips_arch_opt_value) String(4650) Value(25)
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EnumValue
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Enum(mips_arch_opt_value) String(8000) Value(26)
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Enum(mips_arch_opt_value) String(r4700) Value(26) Canonical
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EnumValue
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Enum(mips_arch_opt_value) String(8k) Value(26)
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Enum(mips_arch_opt_value) String(4700) Value(26)
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EnumValue
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Enum(mips_arch_opt_value) String(r10000) Value(27) Canonical
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Enum(mips_arch_opt_value) String(r5900) Value(27) Canonical
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EnumValue
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Enum(mips_arch_opt_value) String(r10k) Value(27)
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Enum(mips_arch_opt_value) String(5900) Value(27)
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EnumValue
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Enum(mips_arch_opt_value) String(10000) Value(27)
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Enum(mips_arch_opt_value) String(loongson2e) Value(28) Canonical
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EnumValue
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Enum(mips_arch_opt_value) String(10k) Value(27)
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Enum(mips_arch_opt_value) String(loongson2f) Value(29) Canonical
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EnumValue
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Enum(mips_arch_opt_value) String(r12000) Value(28) Canonical
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Enum(mips_arch_opt_value) String(r8000) Value(30) Canonical
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EnumValue
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Enum(mips_arch_opt_value) String(r12k) Value(28)
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Enum(mips_arch_opt_value) String(r8k) Value(30)
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EnumValue
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Enum(mips_arch_opt_value) String(12000) Value(28)
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Enum(mips_arch_opt_value) String(8000) Value(30)
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EnumValue
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Enum(mips_arch_opt_value) String(12k) Value(28)
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Enum(mips_arch_opt_value) String(8k) Value(30)
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EnumValue
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Enum(mips_arch_opt_value) String(r14000) Value(29) Canonical
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Enum(mips_arch_opt_value) String(r10000) Value(31) Canonical
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EnumValue
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Enum(mips_arch_opt_value) String(r14k) Value(29)
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Enum(mips_arch_opt_value) String(r10k) Value(31)
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EnumValue
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Enum(mips_arch_opt_value) String(14000) Value(29)
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Enum(mips_arch_opt_value) String(10000) Value(31)
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EnumValue
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Enum(mips_arch_opt_value) String(14k) Value(29)
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Enum(mips_arch_opt_value) String(10k) Value(31)
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EnumValue
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Enum(mips_arch_opt_value) String(r16000) Value(30) Canonical
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Enum(mips_arch_opt_value) String(r12000) Value(32) Canonical
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EnumValue
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Enum(mips_arch_opt_value) String(r16k) Value(30)
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Enum(mips_arch_opt_value) String(r12k) Value(32)
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EnumValue
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Enum(mips_arch_opt_value) String(16000) Value(30)
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Enum(mips_arch_opt_value) String(12000) Value(32)
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EnumValue
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Enum(mips_arch_opt_value) String(16k) Value(30)
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Enum(mips_arch_opt_value) String(12k) Value(32)
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EnumValue
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Enum(mips_arch_opt_value) String(vr5000) Value(31) Canonical
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Enum(mips_arch_opt_value) String(r14000) Value(33) Canonical
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EnumValue
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Enum(mips_arch_opt_value) String(vr5k) Value(31)
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Enum(mips_arch_opt_value) String(r14k) Value(33)
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EnumValue
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Enum(mips_arch_opt_value) String(5000) Value(31)
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Enum(mips_arch_opt_value) String(14000) Value(33)
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EnumValue
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Enum(mips_arch_opt_value) String(5k) Value(31)
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Enum(mips_arch_opt_value) String(14k) Value(33)
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EnumValue
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Enum(mips_arch_opt_value) String(r5000) Value(31)
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Enum(mips_arch_opt_value) String(r16000) Value(34) Canonical
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EnumValue
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Enum(mips_arch_opt_value) String(r5k) Value(31)
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Enum(mips_arch_opt_value) String(r16k) Value(34)
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EnumValue
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Enum(mips_arch_opt_value) String(vr5400) Value(32) Canonical
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Enum(mips_arch_opt_value) String(16000) Value(34)
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EnumValue
|
||||
Enum(mips_arch_opt_value) String(5400) Value(32)
|
||||
Enum(mips_arch_opt_value) String(16k) Value(34)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r5400) Value(32)
|
||||
Enum(mips_arch_opt_value) String(vr5000) Value(35) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(vr5500) Value(33) Canonical
|
||||
Enum(mips_arch_opt_value) String(vr5k) Value(35)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(5500) Value(33)
|
||||
Enum(mips_arch_opt_value) String(5000) Value(35)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r5500) Value(33)
|
||||
Enum(mips_arch_opt_value) String(5k) Value(35)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(rm7000) Value(34) Canonical
|
||||
Enum(mips_arch_opt_value) String(r5000) Value(35)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(rm7k) Value(34)
|
||||
Enum(mips_arch_opt_value) String(r5k) Value(35)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(7000) Value(34)
|
||||
Enum(mips_arch_opt_value) String(vr5400) Value(36) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(7k) Value(34)
|
||||
Enum(mips_arch_opt_value) String(5400) Value(36)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r7000) Value(34)
|
||||
Enum(mips_arch_opt_value) String(r5400) Value(36)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r7k) Value(34)
|
||||
Enum(mips_arch_opt_value) String(vr5500) Value(37) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(rm9000) Value(35) Canonical
|
||||
Enum(mips_arch_opt_value) String(5500) Value(37)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(rm9k) Value(35)
|
||||
Enum(mips_arch_opt_value) String(r5500) Value(37)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(9000) Value(35)
|
||||
Enum(mips_arch_opt_value) String(rm7000) Value(38) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(9k) Value(35)
|
||||
Enum(mips_arch_opt_value) String(rm7k) Value(38)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r9000) Value(35)
|
||||
Enum(mips_arch_opt_value) String(7000) Value(38)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r9k) Value(35)
|
||||
Enum(mips_arch_opt_value) String(7k) Value(38)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(4kc) Value(36) Canonical
|
||||
Enum(mips_arch_opt_value) String(r7000) Value(38)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r4kc) Value(36)
|
||||
Enum(mips_arch_opt_value) String(r7k) Value(38)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(4km) Value(37) Canonical
|
||||
Enum(mips_arch_opt_value) String(rm9000) Value(39) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r4km) Value(37)
|
||||
Enum(mips_arch_opt_value) String(rm9k) Value(39)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(4kp) Value(38) Canonical
|
||||
Enum(mips_arch_opt_value) String(9000) Value(39)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r4kp) Value(38)
|
||||
Enum(mips_arch_opt_value) String(9k) Value(39)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(4ksc) Value(39) Canonical
|
||||
Enum(mips_arch_opt_value) String(r9000) Value(39)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r4ksc) Value(39)
|
||||
Enum(mips_arch_opt_value) String(r9k) Value(39)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(m4k) Value(40) Canonical
|
||||
Enum(mips_arch_opt_value) String(4kc) Value(40) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(m14kc) Value(41) Canonical
|
||||
Enum(mips_arch_opt_value) String(r4kc) Value(40)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(m14k) Value(42) Canonical
|
||||
Enum(mips_arch_opt_value) String(4km) Value(41) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(m14ke) Value(43) Canonical
|
||||
Enum(mips_arch_opt_value) String(r4km) Value(41)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(m14kec) Value(44) Canonical
|
||||
Enum(mips_arch_opt_value) String(4kp) Value(42) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(4kec) Value(45) Canonical
|
||||
Enum(mips_arch_opt_value) String(r4kp) Value(42)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r4kec) Value(45)
|
||||
Enum(mips_arch_opt_value) String(4ksc) Value(43) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(4kem) Value(46) Canonical
|
||||
Enum(mips_arch_opt_value) String(r4ksc) Value(43)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r4kem) Value(46)
|
||||
Enum(mips_arch_opt_value) String(m4k) Value(44) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(4kep) Value(47) Canonical
|
||||
Enum(mips_arch_opt_value) String(m14kc) Value(45) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r4kep) Value(47)
|
||||
Enum(mips_arch_opt_value) String(m14k) Value(46) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(4ksd) Value(48) Canonical
|
||||
Enum(mips_arch_opt_value) String(m14ke) Value(47) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r4ksd) Value(48)
|
||||
Enum(mips_arch_opt_value) String(m14kec) Value(48) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(24kc) Value(49) Canonical
|
||||
Enum(mips_arch_opt_value) String(4kec) Value(49) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r24kc) Value(49)
|
||||
Enum(mips_arch_opt_value) String(r4kec) Value(49)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(24kf2_1) Value(50) Canonical
|
||||
Enum(mips_arch_opt_value) String(4kem) Value(50) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r24kf2_1) Value(50)
|
||||
Enum(mips_arch_opt_value) String(r4kem) Value(50)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(24kf) Value(51) Canonical
|
||||
Enum(mips_arch_opt_value) String(4kep) Value(51) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r24kf) Value(51)
|
||||
Enum(mips_arch_opt_value) String(r4kep) Value(51)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(24kf1_1) Value(52) Canonical
|
||||
Enum(mips_arch_opt_value) String(4ksd) Value(52) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r24kf1_1) Value(52)
|
||||
Enum(mips_arch_opt_value) String(r4ksd) Value(52)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(24kfx) Value(53) Canonical
|
||||
Enum(mips_arch_opt_value) String(24kc) Value(53) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r24kfx) Value(53)
|
||||
Enum(mips_arch_opt_value) String(r24kc) Value(53)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(24kx) Value(54) Canonical
|
||||
Enum(mips_arch_opt_value) String(24kf2_1) Value(54) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r24kx) Value(54)
|
||||
Enum(mips_arch_opt_value) String(r24kf2_1) Value(54)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(24kec) Value(55) Canonical
|
||||
Enum(mips_arch_opt_value) String(24kf) Value(55) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r24kec) Value(55)
|
||||
Enum(mips_arch_opt_value) String(r24kf) Value(55)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(24kef2_1) Value(56) Canonical
|
||||
Enum(mips_arch_opt_value) String(24kf1_1) Value(56) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r24kef2_1) Value(56)
|
||||
Enum(mips_arch_opt_value) String(r24kf1_1) Value(56)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(24kef) Value(57) Canonical
|
||||
Enum(mips_arch_opt_value) String(24kfx) Value(57) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r24kef) Value(57)
|
||||
Enum(mips_arch_opt_value) String(r24kfx) Value(57)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(24kef1_1) Value(58) Canonical
|
||||
Enum(mips_arch_opt_value) String(24kx) Value(58) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r24kef1_1) Value(58)
|
||||
Enum(mips_arch_opt_value) String(r24kx) Value(58)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(24kefx) Value(59) Canonical
|
||||
Enum(mips_arch_opt_value) String(24kec) Value(59) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r24kefx) Value(59)
|
||||
Enum(mips_arch_opt_value) String(r24kec) Value(59)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(24kex) Value(60) Canonical
|
||||
Enum(mips_arch_opt_value) String(24kef2_1) Value(60) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r24kex) Value(60)
|
||||
Enum(mips_arch_opt_value) String(r24kef2_1) Value(60)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(34kc) Value(61) Canonical
|
||||
Enum(mips_arch_opt_value) String(24kef) Value(61) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r34kc) Value(61)
|
||||
Enum(mips_arch_opt_value) String(r24kef) Value(61)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(34kf2_1) Value(62) Canonical
|
||||
Enum(mips_arch_opt_value) String(24kef1_1) Value(62) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r34kf2_1) Value(62)
|
||||
Enum(mips_arch_opt_value) String(r24kef1_1) Value(62)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(34kf) Value(63) Canonical
|
||||
Enum(mips_arch_opt_value) String(24kefx) Value(63) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r34kf) Value(63)
|
||||
Enum(mips_arch_opt_value) String(r24kefx) Value(63)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(34kf1_1) Value(64) Canonical
|
||||
Enum(mips_arch_opt_value) String(24kex) Value(64) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r34kf1_1) Value(64)
|
||||
Enum(mips_arch_opt_value) String(r24kex) Value(64)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(34kfx) Value(65) Canonical
|
||||
Enum(mips_arch_opt_value) String(34kc) Value(65) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r34kfx) Value(65)
|
||||
Enum(mips_arch_opt_value) String(r34kc) Value(65)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(34kx) Value(66) Canonical
|
||||
Enum(mips_arch_opt_value) String(34kf2_1) Value(66) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r34kx) Value(66)
|
||||
Enum(mips_arch_opt_value) String(r34kf2_1) Value(66)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(34kn) Value(67) Canonical
|
||||
Enum(mips_arch_opt_value) String(34kf) Value(67) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r34kn) Value(67)
|
||||
Enum(mips_arch_opt_value) String(r34kf) Value(67)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(74kc) Value(68) Canonical
|
||||
Enum(mips_arch_opt_value) String(34kf1_1) Value(68) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r74kc) Value(68)
|
||||
Enum(mips_arch_opt_value) String(r34kf1_1) Value(68)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(74kf2_1) Value(69) Canonical
|
||||
Enum(mips_arch_opt_value) String(34kfx) Value(69) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r74kf2_1) Value(69)
|
||||
Enum(mips_arch_opt_value) String(r34kfx) Value(69)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(74kf) Value(70) Canonical
|
||||
Enum(mips_arch_opt_value) String(34kx) Value(70) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r74kf) Value(70)
|
||||
Enum(mips_arch_opt_value) String(r34kx) Value(70)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(74kf1_1) Value(71) Canonical
|
||||
Enum(mips_arch_opt_value) String(34kn) Value(71) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r74kf1_1) Value(71)
|
||||
Enum(mips_arch_opt_value) String(r34kn) Value(71)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(74kfx) Value(72) Canonical
|
||||
Enum(mips_arch_opt_value) String(74kc) Value(72) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r74kfx) Value(72)
|
||||
Enum(mips_arch_opt_value) String(r74kc) Value(72)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(74kx) Value(73) Canonical
|
||||
Enum(mips_arch_opt_value) String(74kf2_1) Value(73) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r74kx) Value(73)
|
||||
Enum(mips_arch_opt_value) String(r74kf2_1) Value(73)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(74kf3_2) Value(74) Canonical
|
||||
Enum(mips_arch_opt_value) String(74kf) Value(74) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r74kf3_2) Value(74)
|
||||
Enum(mips_arch_opt_value) String(r74kf) Value(74)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(1004kc) Value(75) Canonical
|
||||
Enum(mips_arch_opt_value) String(74kf1_1) Value(75) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r1004kc) Value(75)
|
||||
Enum(mips_arch_opt_value) String(r74kf1_1) Value(75)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(1004kf2_1) Value(76) Canonical
|
||||
Enum(mips_arch_opt_value) String(74kfx) Value(76) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r1004kf2_1) Value(76)
|
||||
Enum(mips_arch_opt_value) String(r74kfx) Value(76)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(1004kf) Value(77) Canonical
|
||||
Enum(mips_arch_opt_value) String(74kx) Value(77) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r1004kf) Value(77)
|
||||
Enum(mips_arch_opt_value) String(r74kx) Value(77)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(1004kf1_1) Value(78) Canonical
|
||||
Enum(mips_arch_opt_value) String(74kf3_2) Value(78) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r1004kf1_1) Value(78)
|
||||
Enum(mips_arch_opt_value) String(r74kf3_2) Value(78)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(5kc) Value(79) Canonical
|
||||
Enum(mips_arch_opt_value) String(1004kc) Value(79) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r5kc) Value(79)
|
||||
Enum(mips_arch_opt_value) String(r1004kc) Value(79)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(5kf) Value(80) Canonical
|
||||
Enum(mips_arch_opt_value) String(1004kf2_1) Value(80) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r5kf) Value(80)
|
||||
Enum(mips_arch_opt_value) String(r1004kf2_1) Value(80)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(20kc) Value(81) Canonical
|
||||
Enum(mips_arch_opt_value) String(1004kf) Value(81) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(r20kc) Value(81)
|
||||
Enum(mips_arch_opt_value) String(r1004kf) Value(81)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(sb1) Value(82) Canonical
|
||||
Enum(mips_arch_opt_value) String(1004kf1_1) Value(82) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(sb1a) Value(83) Canonical
|
||||
Enum(mips_arch_opt_value) String(r1004kf1_1) Value(82)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(sr71000) Value(84) Canonical
|
||||
Enum(mips_arch_opt_value) String(5kc) Value(83) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(sr71k) Value(84)
|
||||
Enum(mips_arch_opt_value) String(r5kc) Value(83)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(xlr) Value(85) Canonical
|
||||
Enum(mips_arch_opt_value) String(5kf) Value(84) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(loongson3a) Value(86) Canonical
|
||||
Enum(mips_arch_opt_value) String(r5kf) Value(84)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(octeon) Value(87) Canonical
|
||||
Enum(mips_arch_opt_value) String(20kc) Value(85) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(octeon+) Value(88) Canonical
|
||||
Enum(mips_arch_opt_value) String(r20kc) Value(85)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(octeon2) Value(89) Canonical
|
||||
Enum(mips_arch_opt_value) String(sb1) Value(86) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(xlp) Value(90) Canonical
|
||||
Enum(mips_arch_opt_value) String(sb1a) Value(87) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(sr71000) Value(88) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(sr71k) Value(88)
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(xlr) Value(89) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(loongson3a) Value(90) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(octeon) Value(91) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(octeon+) Value(92) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(octeon2) Value(93) Canonical
|
||||
|
||||
EnumValue
|
||||
Enum(mips_arch_opt_value) String(xlp) Value(94) Canonical
|
||||
|
||||
|
|
|
|||
|
|
@ -10030,8 +10030,8 @@ mips_compute_frame_info (void)
|
|||
/* Set this function's interrupt properties. */
|
||||
if (mips_interrupt_type_p (TREE_TYPE (current_function_decl)))
|
||||
{
|
||||
if (!ISA_MIPS32R2)
|
||||
error ("the %<interrupt%> attribute requires a MIPS32r2 processor");
|
||||
if (mips_isa_rev < 2)
|
||||
error ("the %<interrupt%> attribute requires a MIPS32r2 processor or greater");
|
||||
else if (TARGET_HARD_FLOAT)
|
||||
error ("the %<interrupt%> attribute requires %<-msoft-float%>");
|
||||
else if (TARGET_MIPS16)
|
||||
|
|
|
|||
|
|
@ -208,8 +208,12 @@ struct mips_cpu_info {
|
|||
#define ISA_MIPS4 (mips_isa == 4)
|
||||
#define ISA_MIPS32 (mips_isa == 32)
|
||||
#define ISA_MIPS32R2 (mips_isa == 33)
|
||||
#define ISA_MIPS32R3 (mips_isa == 34)
|
||||
#define ISA_MIPS32R5 (mips_isa == 36)
|
||||
#define ISA_MIPS64 (mips_isa == 64)
|
||||
#define ISA_MIPS64R2 (mips_isa == 65)
|
||||
#define ISA_MIPS64R3 (mips_isa == 66)
|
||||
#define ISA_MIPS64R5 (mips_isa == 68)
|
||||
|
||||
/* Architecture target defines. */
|
||||
#define TARGET_LOONGSON_2E (mips_arch == PROCESSOR_LOONGSON_2E)
|
||||
|
|
@ -448,6 +452,16 @@ struct mips_cpu_info {
|
|||
builtin_define ("__mips=32"); \
|
||||
builtin_define ("_MIPS_ISA=_MIPS_ISA_MIPS32"); \
|
||||
} \
|
||||
else if (ISA_MIPS32R3) \
|
||||
{ \
|
||||
builtin_define ("__mips=32"); \
|
||||
builtin_define ("_MIPS_ISA=_MIPS_ISA_MIPS32"); \
|
||||
} \
|
||||
else if (ISA_MIPS32R5) \
|
||||
{ \
|
||||
builtin_define ("__mips=32"); \
|
||||
builtin_define ("_MIPS_ISA=_MIPS_ISA_MIPS32"); \
|
||||
} \
|
||||
else if (ISA_MIPS64) \
|
||||
{ \
|
||||
builtin_define ("__mips=64"); \
|
||||
|
|
@ -458,6 +472,16 @@ struct mips_cpu_info {
|
|||
builtin_define ("__mips=64"); \
|
||||
builtin_define ("_MIPS_ISA=_MIPS_ISA_MIPS64"); \
|
||||
} \
|
||||
else if (ISA_MIPS64R3) \
|
||||
{ \
|
||||
builtin_define ("__mips=64"); \
|
||||
builtin_define ("_MIPS_ISA=_MIPS_ISA_MIPS64"); \
|
||||
} \
|
||||
else if (ISA_MIPS64R5) \
|
||||
{ \
|
||||
builtin_define ("__mips=64"); \
|
||||
builtin_define ("_MIPS_ISA=_MIPS_ISA_MIPS64"); \
|
||||
} \
|
||||
if (mips_isa_rev > 0) \
|
||||
builtin_define_with_int_value ("__mips_isa_rev", \
|
||||
mips_isa_rev); \
|
||||
|
|
@ -699,9 +723,13 @@ struct mips_cpu_info {
|
|||
%{march=mips32|march=4kc|march=4km|march=4kp|march=4ksc:-mips32} \
|
||||
%{march=mips32r2|march=m4k|march=4ke*|march=4ksd|march=24k* \
|
||||
|march=34k*|march=74k*|march=m14k*|march=1004k*: -mips32r2} \
|
||||
%{march=mips32r3: -mips32r3} \
|
||||
%{march=mips32r5: -mips32r5} \
|
||||
%{march=mips64|march=5k*|march=20k*|march=sb1*|march=sr71000 \
|
||||
|march=xlr: -mips64} \
|
||||
%{march=mips64r2|march=loongson3a|march=octeon|march=xlp: -mips64r2} \
|
||||
%{march=mips64r3: -mips64r3} \
|
||||
%{march=mips64r5: -mips64r5} \
|
||||
%{!march=*: -" MULTILIB_ISA_DEFAULT "}}"
|
||||
|
||||
/* A spec that infers a -mhard-float or -msoft-float setting from an
|
||||
|
|
@ -724,7 +752,8 @@ struct mips_cpu_info {
|
|||
/* Infer a -msynci setting from a -mips argument, on the assumption that
|
||||
-msynci is desired where possible. */
|
||||
#define MIPS_ISA_SYNCI_SPEC \
|
||||
"%{msynci|mno-synci:;:%{mips32r2|mips64r2:-msynci;:-mno-synci}}"
|
||||
"%{msynci|mno-synci:;:%{mips32r2|mips32r3|mips32r5|mips64r2|mips64r3 \
|
||||
|mips64r5:-msynci;:-mno-synci}}"
|
||||
|
||||
#if (MIPS_ABI_DEFAULT == ABI_O64 \
|
||||
|| MIPS_ABI_DEFAULT == ABI_N32 \
|
||||
|
|
@ -800,7 +829,9 @@ struct mips_cpu_info {
|
|||
#define ISA_HAS_64BIT_REGS (ISA_MIPS3 \
|
||||
|| ISA_MIPS4 \
|
||||
|| ISA_MIPS64 \
|
||||
|| ISA_MIPS64R2)
|
||||
|| ISA_MIPS64R2 \
|
||||
|| ISA_MIPS64R3 \
|
||||
|| ISA_MIPS64R5)
|
||||
|
||||
/* ISA has branch likely instructions (e.g. mips2). */
|
||||
/* Disable branchlikely for tx39 until compare rewrite. They haven't
|
||||
|
|
|
|||
|
|
@ -30,4 +30,4 @@ else
|
|||
MULTILIB_EXCLUSIONS = !mips32r2/mfp64
|
||||
endif
|
||||
endif
|
||||
MULTILIB_MATCHES = EL=mel EB=meb
|
||||
MULTILIB_MATCHES = EL=mel EB=meb mips32r2=mips32r3 mips32r2=mips32r5 mips64r2=mips64r3 mips64r2=mips64r5
|
||||
|
|
|
|||
|
|
@ -21,7 +21,7 @@
|
|||
|
||||
MULTILIB_OPTIONS = mips32/mips64/mips64r2 mips16/mmicromips mabi=64 EL msoft-float/mfp64 mnan=2008
|
||||
MULTILIB_DIRNAMES = mips32 mips64 mips64r2 mips16 micromips 64 el sof fp64 nan2008
|
||||
MULTILIB_MATCHES = EL=mel EB=meb
|
||||
MULTILIB_MATCHES = EL=mel EB=meb mips32r2=mips32r3 mips32r2=mips32r5 mips64r2=mips64r3 mips64r2=mips64r5
|
||||
|
||||
# The 64 bit ABI is not supported on the mips32 architecture.
|
||||
MULTILIB_EXCEPTIONS += *mips32*/*mabi=64*
|
||||
|
|
|
|||
|
|
@ -21,7 +21,7 @@
|
|||
|
||||
MULTILIB_OPTIONS = mips32/mips64/mips64r2 mips16/mmicromips mabi=64 EL msoft-float/mfp64 mnan=2008
|
||||
MULTILIB_DIRNAMES = mips32 mips64 mips64r2 mips16 micromips 64 el sof fp64 nan2008
|
||||
MULTILIB_MATCHES = EL=mel EB=meb
|
||||
MULTILIB_MATCHES = EL=mel EB=meb mips32r2=mips32r3 mips32r2=mips32r5 mips64r2=mips64r3 mips64r2=mips64r5
|
||||
|
||||
# The 64 bit ABI is not supported on the mips32 architecture.
|
||||
MULTILIB_EXCEPTIONS += *mips32*/*mabi=64*
|
||||
|
|
|
|||
|
|
@ -18,7 +18,7 @@
|
|||
|
||||
MULTILIB_OPTIONS = EL/EB mips32/mips32r2/mips64/mips64r2 mips16/mmicromips msoft-float/mfp64 mcode-readable=no
|
||||
MULTILIB_DIRNAMES = el eb mips32 mips32r2 mips64 mips64r2 mips16 micromips sof f64 spram
|
||||
MULTILIB_MATCHES = EL=mel EB=meb
|
||||
MULTILIB_MATCHES = EL=mel EB=meb mips32r2=mips32r3 mips32r2=mips32r5 mips64r2=mips64r3 mips64r2=mips64r5
|
||||
|
||||
# The -mfp64 option is only valid in conjunction with -mips32r2.
|
||||
ifneq ($(filter MIPS_ISA_DEFAULT=33,$(tm_defines)),)
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@
|
|||
|
||||
MULTILIB_OPTIONS = EL/EB mips32/mips32r2/mips64/mips64r2 mips16 msoft-float/mno-float/mfp64
|
||||
MULTILIB_DIRNAMES = el eb mips32 mips32r2 mips64 mips64r2 mips16 sof nof f64
|
||||
MULTILIB_MATCHES = mips32r2=mips32r3 mips32r2=mips32r5 mips64r2=mips64r3 mips64r2=mips64r5
|
||||
|
||||
# Remove stdarg.h and stddef.h from USER_H.
|
||||
USER_H = $(srcdir)/ginclude/float.h \
|
||||
|
|
|
|||
|
|
@ -771,8 +771,8 @@ Objective-C and Objective-C++ Dialects}.
|
|||
|
||||
@emph{MIPS Options}
|
||||
@gccoptlist{-EL -EB -march=@var{arch} -mtune=@var{arch} @gol
|
||||
-mips1 -mips2 -mips3 -mips4 -mips32 -mips32r2 @gol
|
||||
-mips64 -mips64r2 @gol
|
||||
-mips1 -mips2 -mips3 -mips4 -mips32 -mips32r2 -mips32r3 -mips32r5 @gol
|
||||
-mips64 -mips64r2 -mips64r3 -mips64r5 @gol
|
||||
-mips16 -mno-mips16 -mflip-mips16 @gol
|
||||
-minterlink-compressed -mno-interlink-compressed @gol
|
||||
-minterlink-mips16 -mno-interlink-mips16 @gol
|
||||
|
|
@ -17158,7 +17158,8 @@ Generate code that runs on @var{arch}, which can be the name of a
|
|||
generic MIPS ISA, or the name of a particular processor.
|
||||
The ISA names are:
|
||||
@samp{mips1}, @samp{mips2}, @samp{mips3}, @samp{mips4},
|
||||
@samp{mips32}, @samp{mips32r2}, @samp{mips64} and @samp{mips64r2}.
|
||||
@samp{mips32}, @samp{mips32r2}, @samp{mips32r3}, @samp{mips32r5},
|
||||
@samp{mips64}, @samp{mips64r2}, @samp{mips64r3} and @samp{mips64r5}.
|
||||
The processor names are:
|
||||
@samp{4kc}, @samp{4km}, @samp{4kp}, @samp{4ksc},
|
||||
@samp{4kec}, @samp{4kem}, @samp{4kep}, @samp{4ksd},
|
||||
|
|
@ -17256,9 +17257,13 @@ Equivalent to @option{-march=mips4}.
|
|||
@opindex mips32
|
||||
Equivalent to @option{-march=mips32}.
|
||||
|
||||
@item -mips32r2
|
||||
@opindex mips32r2
|
||||
Equivalent to @option{-march=mips32r2}.
|
||||
@item -mips32r3
|
||||
@opindex mips32r3
|
||||
Equivalent to @option{-march=mips32r3}.
|
||||
|
||||
@item -mips32r5
|
||||
@opindex mips32r5
|
||||
Equivalent to @option{-march=mips32r5}.
|
||||
|
||||
@item -mips64
|
||||
@opindex mips64
|
||||
|
|
@ -17268,6 +17273,14 @@ Equivalent to @option{-march=mips64}.
|
|||
@opindex mips64r2
|
||||
Equivalent to @option{-march=mips64r2}.
|
||||
|
||||
@item -mips64r3
|
||||
@opindex mips64r3
|
||||
Equivalent to @option{-march=mips64r3}.
|
||||
|
||||
@item -mips64r5
|
||||
@opindex mips64r5
|
||||
Equivalent to @option{-march=mips64r5}.
|
||||
|
||||
@item -mips16
|
||||
@itemx -mno-mips16
|
||||
@opindex mips16
|
||||
|
|
@ -17328,7 +17341,7 @@ GCC supports a variant of the o32 ABI in which floating-point registers
|
|||
are 64 rather than 32 bits wide. You can select this combination with
|
||||
@option{-mabi=32} @option{-mfp64}. This ABI relies on the @code{mthc1}
|
||||
and @code{mfhc1} instructions and is therefore only supported for
|
||||
MIPS32R2 processors.
|
||||
MIPS32R2, MIPS32R3 and MIPS32R5 processors.
|
||||
|
||||
The register assignments for arguments and return values remain the
|
||||
same, but each scalar value is passed in a single 64-bit register
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue