vsx.md (vsx_fmav4sf4): Use correct constraints for V2DF, V4SF, DF, and DI modes.
2014-09-10 Michael Meissner <meissner@linux.vnet.ibm.com> * config/rs6000/vsx.md (vsx_fmav4sf4): Use correct constraints for V2DF, V4SF, DF, and DI modes. (vsx_fmav2df2): Likewise. (vsx_float_fix_<mode>2): Likewise. (vsx_reduc_<VEC_reduc_name>_v2df_scalar): Likewise. From-SVN: r215138
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2 changed files with 19 additions and 11 deletions
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@ -1,3 +1,11 @@
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2014-09-10 Michael Meissner <meissner@linux.vnet.ibm.com>
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* config/rs6000/vsx.md (vsx_fmav4sf4): Use correct constraints for
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V2DF, V4SF, DF, and DI modes.
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(vsx_fmav2df2): Likewise.
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(vsx_float_fix_<mode>2): Likewise.
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(vsx_reduc_<VEC_reduc_name>_v2df_scalar): Likewise.
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2014-09-10 Xinliang David Li <davidxl@google.com>
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PR target/63209
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@ -996,11 +996,11 @@
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;; multiply.
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(define_insn "*vsx_fmav4sf4"
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[(set (match_operand:V4SF 0 "vsx_register_operand" "=ws,ws,?wa,?wa,v")
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[(set (match_operand:V4SF 0 "vsx_register_operand" "=wf,wf,?wa,?wa,v")
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(fma:V4SF
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(match_operand:V4SF 1 "vsx_register_operand" "%ws,ws,wa,wa,v")
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(match_operand:V4SF 2 "vsx_register_operand" "ws,0,wa,0,v")
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(match_operand:V4SF 3 "vsx_register_operand" "0,ws,0,wa,v")))]
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(match_operand:V4SF 1 "vsx_register_operand" "%wf,wf,wa,wa,v")
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(match_operand:V4SF 2 "vsx_register_operand" "wf,0,wa,0,v")
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(match_operand:V4SF 3 "vsx_register_operand" "0,wf,0,wa,v")))]
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"VECTOR_UNIT_VSX_P (V4SFmode)"
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"@
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xvmaddasp %x0,%x1,%x2
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@ -1011,11 +1011,11 @@
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[(set_attr "type" "vecfloat")])
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(define_insn "*vsx_fmav2df4"
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[(set (match_operand:V2DF 0 "vsx_register_operand" "=ws,ws,?wa,?wa")
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[(set (match_operand:V2DF 0 "vsx_register_operand" "=wd,wd,?wa,?wa")
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(fma:V2DF
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(match_operand:V2DF 1 "vsx_register_operand" "%ws,ws,wa,wa")
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(match_operand:V2DF 2 "vsx_register_operand" "ws,0,wa,0")
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(match_operand:V2DF 3 "vsx_register_operand" "0,ws,0,wa")))]
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(match_operand:V2DF 1 "vsx_register_operand" "%wd,wd,wa,wa")
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(match_operand:V2DF 2 "vsx_register_operand" "wd,0,wa,0")
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(match_operand:V2DF 3 "vsx_register_operand" "0,wd,0,wa")))]
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"VECTOR_UNIT_VSX_P (V2DFmode)"
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"@
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xvmaddadp %x0,%x1,%x2
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@ -1547,8 +1547,8 @@
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(define_insn "vsx_concat_<mode>"
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[(set (match_operand:VSX_D 0 "vsx_register_operand" "=<VSr>,?<VSa>")
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(vec_concat:VSX_D
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(match_operand:<VS_scalar> 1 "vsx_register_operand" "ws,<VSa>")
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(match_operand:<VS_scalar> 2 "vsx_register_operand" "ws,<VSa>")))]
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(match_operand:<VS_scalar> 1 "vsx_register_operand" "<VS_64reg>,<VSa>")
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(match_operand:<VS_scalar> 2 "vsx_register_operand" "<VS_64reg>,<VSa>")))]
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"VECTOR_MEM_VSX_P (<MODE>mode)"
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{
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if (BYTES_BIG_ENDIAN)
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@ -2221,7 +2221,7 @@
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;; to the top element of the V2DF array without doing an extract.
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(define_insn_and_split "*vsx_reduc_<VEC_reduc_name>_v2df_scalar"
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[(set (match_operand:DF 0 "vfloat_operand" "=&ws,&?wa,ws,?wa")
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[(set (match_operand:DF 0 "vfloat_operand" "=&ws,&?ws,ws,?ws")
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(vec_select:DF
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(VEC_reduc:V2DF
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(vec_concat:V2DF
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