rs6000.h (REG_CLASS_CONTENTS): Add VRSAVE bit to ALL_REGS.
2001-11-09 Aldy Hernandez <aldyh@redhat.com> * rs6000.h (REG_CLASS_CONTENTS): Add VRSAVE bit to ALL_REGS. (CONDITIONAL_REGISTER_USAGE): Disable AltiVec registers unless generating altivec code. (FIXED_REGISTERS): VRSAVE is fixed. (CALL_USED_REGISTERS): VRSAVE is call used. From-SVN: r46895
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2 changed files with 16 additions and 8 deletions
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@ -1,3 +1,11 @@
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2001-11-09 Aldy Hernandez <aldyh@redhat.com>
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* rs6000.h (REG_CLASS_CONTENTS): Add VRSAVE bit to ALL_REGS.
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(CONDITIONAL_REGISTER_USAGE): Disable AltiVec registers unless
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generating altivec code.
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(FIXED_REGISTERS): VRSAVE is fixed.
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(CALL_USED_REGISTERS): VRSAVE is call used.
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2001-11-08 Jason Eckhardt <jle@rice.edu>
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* config/mips/mips.c (mips_output_conditional_branch): Do not hard
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@ -687,7 +687,7 @@ extern int rs6000_debug_arg; /* debug argument handling */
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/* AltiVec registers. */ \
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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0 \
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1 \
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}
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/* 1 for registers not available across function calls.
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@ -706,7 +706,7 @@ extern int rs6000_debug_arg; /* debug argument handling */
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/* AltiVec registers. */ \
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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0 \
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1 \
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}
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@ -923,12 +923,12 @@ extern int rs6000_debug_arg; /* debug argument handling */
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global_regs[PIC_OFFSET_TABLE_REGNUM] \
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= fixed_regs[PIC_OFFSET_TABLE_REGNUM] \
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= call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
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if (! TARGET_ALTIVEC) \
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for (i = FIRST_ALTIVEC_REGNO; i <= LAST_ALTIVEC_REGNO; ++i) \
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fixed_regs[i] = call_used_regs[i] = 1; \
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if (TARGET_ALTIVEC_ABI) \
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{ \
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fixed_regs[VRSAVE_REGNO] = call_used_regs[VRSAVE_REGNO] = 1; \
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for (i = FIRST_ALTIVEC_REGNO; i < FIRST_ALTIVEC_REGNO + 20; ++i) \
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call_used_regs[i] = 1; \
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} \
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for (i = FIRST_ALTIVEC_REGNO; i < FIRST_ALTIVEC_REGNO + 20; ++i) \
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call_used_regs[i] = 1; \
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}
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/* Specify the registers used for certain standard purposes.
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@ -1068,7 +1068,7 @@ enum reg_class
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{ 0x00000000, 0x00000000, 0x00000ff0, 0x00000000 }, /* CR_REGS */ \
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{ 0xffffffff, 0x00000000, 0x0000ffff, 0x00000000 }, /* NON_FLOAT_REGS */ \
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{ 0x00000000, 0x00000000, 0x00010000, 0x00000000 }, /* XER_REGS */ \
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{ 0xffffffff, 0xffffffff, 0xffffffff, 0x0001ffff } /* ALL_REGS */ \
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{ 0xffffffff, 0xffffffff, 0xffffffff, 0x0003ffff } /* ALL_REGS */ \
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}
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/* The same information, inverted:
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