rs6000: Delete many HAVE_AS_* (PR87149)

This deletes most HAVE_AS_* that determine if the assembler supports
some ISA level (and also HAVE_AS_MFPGPR and HAVE_AS_DFP).

These are not useful: we will only generate an instruction that requires
some newer ISA if the user specifically asked for it (with -mcpu=, say).
If the assembler cannot handle that, it is fine if it gives an error.

They also hurt: it increases the number of possible situations that all
need handling and all need testing.  We do not handle all cases, and
obviously do not test all either.

This patch removes:

HAVE_AS_POPCNTB (power5,  2.02)
HAVE_AS_FPRND   (power5+, 2.04)
HAVE_AS_CMPB    (power6,  2.05)
HAVE_AS_POPCNTD (power7,  2.06)
HAVE_AS_POWER8  (power8,  2.07)
HAVE_AS_POWER9  (power9,  3.0)

HAVE_AS_DFP     (power6,  2.05, server)
HAVE_AS_MFPGPR  (power6x but not later, not arch)


	PR target/87149
	* config.in (HAVE_AS_CMPB, HAVE_AS_DFP, HAVE_AS_FPRND, HAVE_AS_MFPGPR,
	HAVE_AS_POPCNTB, HAVE_AS_POPCNTD, HAVE_AS_POWER8, HAVE_AS_POWER9):
	Delete, always treat as true.
	* config/powerpcspe/powerpcspe.c (rs6000_option_override_internal):
	Ditto.  Simplify remaining code.
	* config/powerpcspe/powerpcspe.h: Ditto.
	* config/rs6000/rs6000.c (rs6000_option_override_internal): Ditto.
	Simplify remaining code.
	(rs6000_expand_builtin): Ditto.
	* config/rs6000/rs6000.h: Ditto.
	* configure.ac: Ditto.
	* configure: Regenerate.

From-SVN: r264675
This commit is contained in:
Segher Boessenkool 2018-09-27 21:54:09 +02:00 committed by Segher Boessenkool
parent 8830704064
commit 24676f1215
8 changed files with 16 additions and 837 deletions

View file

@ -1,3 +1,19 @@
2018-09-27 Segher Boessenkool <segher@kernel.crashing.org>
PR target/87149
* config.in (HAVE_AS_CMPB, HAVE_AS_DFP, HAVE_AS_FPRND, HAVE_AS_MFPGPR,
HAVE_AS_POPCNTB, HAVE_AS_POPCNTD, HAVE_AS_POWER8, HAVE_AS_POWER9):
Delete, always treat as true.
* config/powerpcspe/powerpcspe.c (rs6000_option_override_internal):
Ditto. Simplify remaining code.
* config/powerpcspe/powerpcspe.h: Ditto.
* config/rs6000/rs6000.c (rs6000_option_override_internal): Ditto.
Simplify remaining code.
(rs6000_expand_builtin): Ditto.
* config/rs6000/rs6000.h: Ditto.
* configure.ac: Ditto.
* configure: Regenerate.
2018-09-27 Martin Liska <mliska@suse.cz>
* coverage.c (get_coverage_counts): Revert the formatting

View file

@ -302,12 +302,6 @@
#endif
/* Define if your assembler supports cmpb. */
#ifndef USED_FOR_TARGET
#undef HAVE_AS_CMPB
#endif
/* Define to the level of your assembler's compressed debug section support.
*/
#ifndef USED_FOR_TARGET
@ -327,12 +321,6 @@
#endif
/* Define if your assembler supports DFP instructions. */
#ifndef USED_FOR_TARGET
#undef HAVE_AS_DFP
#endif
/* Define if your assembler supports .module. */
#ifndef USED_FOR_TARGET
#undef HAVE_AS_DOT_MODULE
@ -382,12 +370,6 @@
#endif
/* Define if your assembler supports fprnd. */
#ifndef USED_FOR_TARGET
#undef HAVE_AS_FPRND
#endif
/* Define if your assembler supports the --gdwarf2 option. */
#ifndef USED_FOR_TARGET
#undef HAVE_AS_GDWARF2_DEBUG_FLAG
@ -570,12 +552,6 @@
#endif
/* Define if your assembler supports mffgpr and mftgpr. */
#ifndef USED_FOR_TARGET
#undef HAVE_AS_MFPGPR
#endif
/* Define if your Mac OS X assembler supports the -mmacos-version-min option.
*/
#ifndef USED_FOR_TARGET
@ -607,30 +583,6 @@
#endif
/* Define if your assembler supports popcntb field. */
#ifndef USED_FOR_TARGET
#undef HAVE_AS_POPCNTB
#endif
/* Define if your assembler supports POPCNTD instructions. */
#ifndef USED_FOR_TARGET
#undef HAVE_AS_POPCNTD
#endif
/* Define if your assembler supports POWER8 instructions. */
#ifndef USED_FOR_TARGET
#undef HAVE_AS_POWER8
#endif
/* Define if your assembler supports POWER9 instructions. */
#ifndef USED_FOR_TARGET
#undef HAVE_AS_POWER9
#endif
/* Define if your assembler supports .ref */
#ifndef USED_FOR_TARGET
#undef HAVE_AS_REF

View file

@ -4196,67 +4196,6 @@ rs6000_option_override_internal (bool global_init_p)
gcc_assert (cpu_index >= 0);
if (have_cpu)
{
#ifndef HAVE_AS_POWER9
if (processor_target_table[rs6000_cpu_index].processor
== PROCESSOR_POWER9)
{
have_cpu = false;
warning (0, "will not generate power9 instructions because "
"assembler lacks power9 support");
}
#endif
#ifndef HAVE_AS_POWER8
if (processor_target_table[rs6000_cpu_index].processor
== PROCESSOR_POWER8)
{
have_cpu = false;
warning (0, "will not generate power8 instructions because "
"assembler lacks power8 support");
}
#endif
#ifndef HAVE_AS_POPCNTD
if (processor_target_table[rs6000_cpu_index].processor
== PROCESSOR_POWER7)
{
have_cpu = false;
warning (0, "will not generate power7 instructions because "
"assembler lacks power7 support");
}
#endif
#ifndef HAVE_AS_DFP
if (processor_target_table[rs6000_cpu_index].processor
== PROCESSOR_POWER6)
{
have_cpu = false;
warning (0, "will not generate power6 instructions because "
"assembler lacks power6 support");
}
#endif
#ifndef HAVE_AS_POPCNTB
if (processor_target_table[rs6000_cpu_index].processor
== PROCESSOR_POWER5)
{
have_cpu = false;
warning (0, "will not generate power5 instructions because "
"assembler lacks power5 support");
}
#endif
if (!have_cpu)
{
/* PowerPC 64-bit LE requires at least ISA 2.07. */
const char *default_cpu = (!TARGET_POWERPC64
? "powerpc"
: (BYTES_BIG_ENDIAN
? "powerpc64"
: "powerpc64le"));
rs6000_cpu_index = cpu_index = rs6000_cpu_name_lookup (default_cpu);
}
}
/* If we have a cpu, either through an explicit -mcpu=<xxx> or if the
compiler was configured with --with-cpu=<xxx>, replace all of the ISA bits
with those from the cpu, except for options that were explicitly set. If

View file

@ -71,35 +71,11 @@
#define TARGET_PAIRED_FLOAT 0
#endif
#ifdef HAVE_AS_POPCNTB
#define ASM_CPU_POWER5_SPEC "-mpower5"
#else
#define ASM_CPU_POWER5_SPEC "-mpower4"
#endif
#ifdef HAVE_AS_DFP
#define ASM_CPU_POWER6_SPEC "-mpower6 -maltivec"
#else
#define ASM_CPU_POWER6_SPEC "-mpower4 -maltivec"
#endif
#ifdef HAVE_AS_POPCNTD
#define ASM_CPU_POWER7_SPEC "-mpower7"
#else
#define ASM_CPU_POWER7_SPEC "-mpower4 -maltivec"
#endif
#ifdef HAVE_AS_POWER8
#define ASM_CPU_POWER8_SPEC "-mpower8"
#else
#define ASM_CPU_POWER8_SPEC ASM_CPU_POWER7_SPEC
#endif
#ifdef HAVE_AS_POWER9
#define ASM_CPU_POWER9_SPEC "-mpower9"
#else
#define ASM_CPU_POWER9_SPEC ASM_CPU_POWER8_SPEC
#endif
#ifdef HAVE_AS_DCI
#define ASM_CPU_476_SPEC "-m476"
@ -240,90 +216,6 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
#define TARGET_MFCRF 0
#endif
/* Define TARGET_POPCNTB if the target assembler does not support the
popcount byte instruction. */
#ifndef HAVE_AS_POPCNTB
#undef TARGET_POPCNTB
#define TARGET_POPCNTB 0
#endif
/* Define TARGET_FPRND if the target assembler does not support the
fp rounding instructions. */
#ifndef HAVE_AS_FPRND
#undef TARGET_FPRND
#define TARGET_FPRND 0
#endif
/* Define TARGET_CMPB if the target assembler does not support the
cmpb instruction. */
#ifndef HAVE_AS_CMPB
#undef TARGET_CMPB
#define TARGET_CMPB 0
#endif
/* Define TARGET_MFPGPR if the target assembler does not support the
mffpr and mftgpr instructions. */
#ifndef HAVE_AS_MFPGPR
#undef TARGET_MFPGPR
#define TARGET_MFPGPR 0
#endif
/* Define TARGET_DFP if the target assembler does not support decimal
floating point instructions. */
#ifndef HAVE_AS_DFP
#undef TARGET_DFP
#define TARGET_DFP 0
#endif
/* Define TARGET_POPCNTD if the target assembler does not support the
popcount word and double word instructions. */
#ifndef HAVE_AS_POPCNTD
#undef TARGET_POPCNTD
#define TARGET_POPCNTD 0
#endif
/* Define the ISA 2.07 flags as 0 if the target assembler does not support the
waitasecond instruction. Allow -mpower8-fusion, since it does not add new
instructions. */
#ifndef HAVE_AS_POWER8
#undef TARGET_DIRECT_MOVE
#undef TARGET_CRYPTO
#undef TARGET_HTM
#undef TARGET_P8_VECTOR
#define TARGET_DIRECT_MOVE 0
#define TARGET_CRYPTO 0
#define TARGET_HTM 0
#define TARGET_P8_VECTOR 0
#endif
/* Define the ISA 3.0 flags as 0 if the target assembler does not support
Power9 instructions. Allow -mpower9-fusion, since it does not add new
instructions. Allow -misel, since it predates ISA 3.0 and does
not require any Power9 features. */
#ifndef HAVE_AS_POWER9
#undef TARGET_FLOAT128_HW
#undef TARGET_MODULO
#undef TARGET_P9_VECTOR
#undef TARGET_P9_MINMAX
#undef TARGET_P9_DFORM_SCALAR
#undef TARGET_P9_DFORM_VECTOR
#undef TARGET_P9_MISC
#define TARGET_FLOAT128_HW 0
#define TARGET_MODULO 0
#define TARGET_P9_VECTOR 0
#define TARGET_P9_MINMAX 0
#define TARGET_P9_DFORM_SCALAR 0
#define TARGET_P9_DFORM_VECTOR 0
#define TARGET_P9_MISC 0
#endif
/* Define TARGET_LWSYNC_INSTRUCTION if the assembler knows about lwsync. If
not, generate the lwsync code as an integer constant. */
#ifdef HAVE_AS_LWSYNC

View file

@ -3871,48 +3871,6 @@ rs6000_option_override_internal (bool global_init_p)
else if (OPTION_TARGET_CPU_DEFAULT)
cpu_index = rs6000_cpu_name_lookup (OPTION_TARGET_CPU_DEFAULT);
if (cpu_index >= 0)
{
const char *unavailable_cpu = NULL;
switch (processor_target_table[cpu_index].processor)
{
#ifndef HAVE_AS_POWER9
case PROCESSOR_POWER9:
unavailable_cpu = "power9";
break;
#endif
#ifndef HAVE_AS_POWER8
case PROCESSOR_POWER8:
unavailable_cpu = "power8";
break;
#endif
#ifndef HAVE_AS_POPCNTD
case PROCESSOR_POWER7:
unavailable_cpu = "power7";
break;
#endif
#ifndef HAVE_AS_DFP
case PROCESSOR_POWER6:
unavailable_cpu = "power6";
break;
#endif
#ifndef HAVE_AS_POPCNTB
case PROCESSOR_POWER5:
unavailable_cpu = "power5";
break;
#endif
default:
break;
}
if (unavailable_cpu)
{
cpu_index = -1;
warning (0, "will not generate %qs instructions because "
"assembler lacks %qs support", unavailable_cpu,
unavailable_cpu);
}
}
/* If we have a cpu, either through an explicit -mcpu=<xxx> or if the
compiler was configured with --with-cpu=<xxx>, replace all of the ISA bits
with those from the cpu, except for options that were explicitly set. If
@ -16018,7 +15976,6 @@ rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
overload table in rs6000-c.c to switch between the two. If we don't have
the proper assembler, don't do this switch because CODE_FOR_*kf* and
CODE_FOR_*tf* will be CODE_FOR_nothing. */
#ifdef HAVE_AS_POWER9
if (FLOAT128_IEEE_P (TFmode))
switch (icode)
{
@ -16039,7 +15996,6 @@ rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
case CODE_FOR_xsiexpqpf_kf: icode = CODE_FOR_xsiexpqpf_tf; break;
case CODE_FOR_xststdcqp_kf: icode = CODE_FOR_xststdcqp_tf; break;
}
#endif
if (TARGET_DEBUG_BUILTIN)
{

View file

@ -72,35 +72,11 @@
#define PPC405_ERRATUM77 0
#endif
#ifdef HAVE_AS_POPCNTB
#define ASM_CPU_POWER5_SPEC "-mpower5"
#else
#define ASM_CPU_POWER5_SPEC "-mpower4"
#endif
#ifdef HAVE_AS_DFP
#define ASM_CPU_POWER6_SPEC "-mpower6 -maltivec"
#else
#define ASM_CPU_POWER6_SPEC "-mpower4 -maltivec"
#endif
#ifdef HAVE_AS_POPCNTD
#define ASM_CPU_POWER7_SPEC "-mpower7"
#else
#define ASM_CPU_POWER7_SPEC "-mpower4 -maltivec"
#endif
#ifdef HAVE_AS_POWER8
#define ASM_CPU_POWER8_SPEC "-mpower8"
#else
#define ASM_CPU_POWER8_SPEC ASM_CPU_POWER7_SPEC
#endif
#ifdef HAVE_AS_POWER9
#define ASM_CPU_POWER9_SPEC "-mpower9"
#else
#define ASM_CPU_POWER9_SPEC ASM_CPU_POWER8_SPEC
#endif
#ifdef HAVE_AS_DCI
#define ASM_CPU_476_SPEC "-m476"
@ -243,86 +219,6 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
#define TARGET_MFCRF 0
#endif
/* Define TARGET_POPCNTB if the target assembler does not support the
popcount byte instruction. */
#ifndef HAVE_AS_POPCNTB
#undef TARGET_POPCNTB
#define TARGET_POPCNTB 0
#endif
/* Define TARGET_FPRND if the target assembler does not support the
fp rounding instructions. */
#ifndef HAVE_AS_FPRND
#undef TARGET_FPRND
#define TARGET_FPRND 0
#endif
/* Define TARGET_CMPB if the target assembler does not support the
cmpb instruction. */
#ifndef HAVE_AS_CMPB
#undef TARGET_CMPB
#define TARGET_CMPB 0
#endif
/* Define TARGET_MFPGPR if the target assembler does not support the
mffpr and mftgpr instructions. */
#ifndef HAVE_AS_MFPGPR
#undef TARGET_MFPGPR
#define TARGET_MFPGPR 0
#endif
/* Define TARGET_DFP if the target assembler does not support decimal
floating point instructions. */
#ifndef HAVE_AS_DFP
#undef TARGET_DFP
#define TARGET_DFP 0
#endif
/* Define TARGET_POPCNTD if the target assembler does not support the
popcount word and double word instructions. */
#ifndef HAVE_AS_POPCNTD
#undef TARGET_POPCNTD
#define TARGET_POPCNTD 0
#endif
/* Define the ISA 2.07 flags as 0 if the target assembler does not support the
waitasecond instruction. Allow -mpower8-fusion, since it does not add new
instructions. */
#ifndef HAVE_AS_POWER8
#undef TARGET_DIRECT_MOVE
#undef TARGET_CRYPTO
#undef TARGET_HTM
#undef TARGET_P8_VECTOR
#define TARGET_DIRECT_MOVE 0
#define TARGET_CRYPTO 0
#define TARGET_HTM 0
#define TARGET_P8_VECTOR 0
#endif
/* Define the ISA 3.0 flags as 0 if the target assembler does not support
Power9 instructions. Allow -mpower9-fusion, since it does not add new
instructions. Allow -misel, since it predates ISA 3.0 and does
not require any Power9 features. */
#ifndef HAVE_AS_POWER9
#undef TARGET_FLOAT128_HW
#undef TARGET_MODULO
#undef TARGET_P9_VECTOR
#undef TARGET_P9_MINMAX
#undef TARGET_P9_MISC
#define TARGET_FLOAT128_HW 0
#define TARGET_MODULO 0
#define TARGET_P9_VECTOR 0
#define TARGET_P9_MINMAX 0
#define TARGET_P9_MISC 0
#endif
/* Define TARGET_LWSYNC_INSTRUCTION if the assembler knows about lwsync. If
not, generate the lwsync code as an integer constant. */
#ifdef HAVE_AS_LWSYNC

356
gcc/configure vendored
View file

@ -26625,141 +26625,6 @@ if test $gcc_cv_as_powerpc_mfcrf = yes; then
$as_echo "#define HAVE_AS_MFCRF 1" >>confdefs.h
fi
case $target in
*-*-aix*) conftest_s=' .machine "pwr5"
.csect .text[PR]
popcntb 3,3';;
*) conftest_s=' .machine power5
.text
popcntb 3,3';;
esac
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for popcntb support" >&5
$as_echo_n "checking assembler for popcntb support... " >&6; }
if test "${gcc_cv_as_powerpc_popcntb+set}" = set; then :
$as_echo_n "(cached) " >&6
else
gcc_cv_as_powerpc_popcntb=no
if test $in_tree_gas = yes; then
if test $gcc_cv_gas_vers -ge `expr \( \( 2 \* 1000 \) + 17 \) \* 1000 + 0`
then gcc_cv_as_powerpc_popcntb=yes
fi
elif test x$gcc_cv_as != x; then
$as_echo "$conftest_s" > conftest.s
if { ac_try='$gcc_cv_as $gcc_cv_as_flags -o conftest.o conftest.s >&5'
{ { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
(eval $ac_try) 2>&5
ac_status=$?
$as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
test $ac_status = 0; }; }
then
gcc_cv_as_powerpc_popcntb=yes
else
echo "configure: failed program was" >&5
cat conftest.s >&5
fi
rm -f conftest.o conftest.s
fi
fi
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_powerpc_popcntb" >&5
$as_echo "$gcc_cv_as_powerpc_popcntb" >&6; }
if test $gcc_cv_as_powerpc_popcntb = yes; then
$as_echo "#define HAVE_AS_POPCNTB 1" >>confdefs.h
fi
case $target in
*-*-aix*) conftest_s=' .machine "pwr5x"
.csect .text[PR]
frin 1,1';;
*) conftest_s=' .machine power5
.text
frin 1,1';;
esac
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for fp round support" >&5
$as_echo_n "checking assembler for fp round support... " >&6; }
if test "${gcc_cv_as_powerpc_fprnd+set}" = set; then :
$as_echo_n "(cached) " >&6
else
gcc_cv_as_powerpc_fprnd=no
if test $in_tree_gas = yes; then
if test $gcc_cv_gas_vers -ge `expr \( \( 2 \* 1000 \) + 17 \) \* 1000 + 0`
then gcc_cv_as_powerpc_fprnd=yes
fi
elif test x$gcc_cv_as != x; then
$as_echo "$conftest_s" > conftest.s
if { ac_try='$gcc_cv_as $gcc_cv_as_flags -o conftest.o conftest.s >&5'
{ { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
(eval $ac_try) 2>&5
ac_status=$?
$as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
test $ac_status = 0; }; }
then
gcc_cv_as_powerpc_fprnd=yes
else
echo "configure: failed program was" >&5
cat conftest.s >&5
fi
rm -f conftest.o conftest.s
fi
fi
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_powerpc_fprnd" >&5
$as_echo "$gcc_cv_as_powerpc_fprnd" >&6; }
if test $gcc_cv_as_powerpc_fprnd = yes; then
$as_echo "#define HAVE_AS_FPRND 1" >>confdefs.h
fi
case $target in
*-*-aix*) conftest_s=' .machine "pwr6"
.csect .text[PR]
mffgpr 1,3';;
*) conftest_s=' .machine power6
.text
mffgpr 1,3';;
esac
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for move fp gpr support" >&5
$as_echo_n "checking assembler for move fp gpr support... " >&6; }
if test "${gcc_cv_as_powerpc_mfpgpr+set}" = set; then :
$as_echo_n "(cached) " >&6
else
gcc_cv_as_powerpc_mfpgpr=no
if test $in_tree_gas = yes; then
if test $gcc_cv_gas_vers -ge `expr \( \( 2 \* 1000 \) + 19 \) \* 1000 + 2`
then gcc_cv_as_powerpc_mfpgpr=yes
fi
elif test x$gcc_cv_as != x; then
$as_echo "$conftest_s" > conftest.s
if { ac_try='$gcc_cv_as $gcc_cv_as_flags -o conftest.o conftest.s >&5'
{ { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
(eval $ac_try) 2>&5
ac_status=$?
$as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
test $ac_status = 0; }; }
then
gcc_cv_as_powerpc_mfpgpr=yes
else
echo "configure: failed program was" >&5
cat conftest.s >&5
fi
rm -f conftest.o conftest.s
fi
fi
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_powerpc_mfpgpr" >&5
$as_echo "$gcc_cv_as_powerpc_mfpgpr" >&6; }
if test $gcc_cv_as_powerpc_mfpgpr = yes; then
$as_echo "#define HAVE_AS_MFPGPR 1" >>confdefs.h
fi
@ -26809,96 +26674,6 @@ if test $gcc_cv_as_powerpc_rel16 = yes; then
$as_echo "#define HAVE_AS_REL16 1" >>confdefs.h
fi
case $target in
*-*-aix*) conftest_s=' .machine "pwr6"
.csect .text[PR]
cmpb 3,4,5';;
*) conftest_s=' .machine power6
.text
cmpb 3,4,5';;
esac
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for compare bytes support" >&5
$as_echo_n "checking assembler for compare bytes support... " >&6; }
if test "${gcc_cv_as_powerpc_cmpb+set}" = set; then :
$as_echo_n "(cached) " >&6
else
gcc_cv_as_powerpc_cmpb=no
if test $in_tree_gas = yes; then
if test $gcc_cv_gas_vers -ge `expr \( \( 2 \* 1000 \) + 19 \) \* 1000 + 2`
then gcc_cv_as_powerpc_cmpb=yes
fi
elif test x$gcc_cv_as != x; then
$as_echo "$conftest_s" > conftest.s
if { ac_try='$gcc_cv_as $gcc_cv_as_flags -a32 -o conftest.o conftest.s >&5'
{ { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
(eval $ac_try) 2>&5
ac_status=$?
$as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
test $ac_status = 0; }; }
then
gcc_cv_as_powerpc_cmpb=yes
else
echo "configure: failed program was" >&5
cat conftest.s >&5
fi
rm -f conftest.o conftest.s
fi
fi
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_powerpc_cmpb" >&5
$as_echo "$gcc_cv_as_powerpc_cmpb" >&6; }
if test $gcc_cv_as_powerpc_cmpb = yes; then
$as_echo "#define HAVE_AS_CMPB 1" >>confdefs.h
fi
case $target in
*-*-aix*) conftest_s=' .machine "pwr6"
.csect .text[PR]
dadd 1,2,3';;
*) conftest_s=' .machine power6
.text
dadd 1,2,3';;
esac
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for decimal float support" >&5
$as_echo_n "checking assembler for decimal float support... " >&6; }
if test "${gcc_cv_as_powerpc_dfp+set}" = set; then :
$as_echo_n "(cached) " >&6
else
gcc_cv_as_powerpc_dfp=no
if test $in_tree_gas = yes; then
if test $gcc_cv_gas_vers -ge `expr \( \( 2 \* 1000 \) + 19 \) \* 1000 + 2`
then gcc_cv_as_powerpc_dfp=yes
fi
elif test x$gcc_cv_as != x; then
$as_echo "$conftest_s" > conftest.s
if { ac_try='$gcc_cv_as $gcc_cv_as_flags -a32 -o conftest.o conftest.s >&5'
{ { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
(eval $ac_try) 2>&5
ac_status=$?
$as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
test $ac_status = 0; }; }
then
gcc_cv_as_powerpc_dfp=yes
else
echo "configure: failed program was" >&5
cat conftest.s >&5
fi
rm -f conftest.o conftest.s
fi
fi
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_powerpc_dfp" >&5
$as_echo "$gcc_cv_as_powerpc_dfp" >&6; }
if test $gcc_cv_as_powerpc_dfp = yes; then
$as_echo "#define HAVE_AS_DFP 1" >>confdefs.h
fi
@ -26944,137 +26719,6 @@ if test $gcc_cv_as_powerpc_vsx = yes; then
$as_echo "#define HAVE_AS_VSX 1" >>confdefs.h
fi
case $target in
*-*-aix*) conftest_s=' .machine "pwr7"
.csect .text[PR]
popcntd 3,3';;
*) conftest_s=' .machine power7
.text
popcntd 3,3';;
esac
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for popcntd support" >&5
$as_echo_n "checking assembler for popcntd support... " >&6; }
if test "${gcc_cv_as_powerpc_popcntd+set}" = set; then :
$as_echo_n "(cached) " >&6
else
gcc_cv_as_powerpc_popcntd=no
if test $in_tree_gas = yes; then
if test $gcc_cv_gas_vers -ge `expr \( \( 2 \* 1000 \) + 19 \) \* 1000 + 2`
then gcc_cv_as_powerpc_popcntd=yes
fi
elif test x$gcc_cv_as != x; then
$as_echo "$conftest_s" > conftest.s
if { ac_try='$gcc_cv_as $gcc_cv_as_flags -a32 -o conftest.o conftest.s >&5'
{ { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
(eval $ac_try) 2>&5
ac_status=$?
$as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
test $ac_status = 0; }; }
then
gcc_cv_as_powerpc_popcntd=yes
else
echo "configure: failed program was" >&5
cat conftest.s >&5
fi
rm -f conftest.o conftest.s
fi
fi
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_powerpc_popcntd" >&5
$as_echo "$gcc_cv_as_powerpc_popcntd" >&6; }
if test $gcc_cv_as_powerpc_popcntd = yes; then
$as_echo "#define HAVE_AS_POPCNTD 1" >>confdefs.h
fi
case $target in
*-*-aix*) conftest_s=' .machine "pwr8"
.csect .text[PR]';;
*) conftest_s=' .machine power8
.text';;
esac
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for power8 support" >&5
$as_echo_n "checking assembler for power8 support... " >&6; }
if test "${gcc_cv_as_powerpc_power8+set}" = set; then :
$as_echo_n "(cached) " >&6
else
gcc_cv_as_powerpc_power8=no
if test $in_tree_gas = yes; then
if test $gcc_cv_gas_vers -ge `expr \( \( 2 \* 1000 \) + 19 \) \* 1000 + 2`
then gcc_cv_as_powerpc_power8=yes
fi
elif test x$gcc_cv_as != x; then
$as_echo "$conftest_s" > conftest.s
if { ac_try='$gcc_cv_as $gcc_cv_as_flags -a32 -o conftest.o conftest.s >&5'
{ { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
(eval $ac_try) 2>&5
ac_status=$?
$as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
test $ac_status = 0; }; }
then
gcc_cv_as_powerpc_power8=yes
else
echo "configure: failed program was" >&5
cat conftest.s >&5
fi
rm -f conftest.o conftest.s
fi
fi
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_powerpc_power8" >&5
$as_echo "$gcc_cv_as_powerpc_power8" >&6; }
if test $gcc_cv_as_powerpc_power8 = yes; then
$as_echo "#define HAVE_AS_POWER8 1" >>confdefs.h
fi
case $target in
*-*-aix*) conftest_s=' .machine "pwr9"
.csect .text[PR]';;
*) conftest_s=' .machine power9
.text';;
esac
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for power9 support" >&5
$as_echo_n "checking assembler for power9 support... " >&6; }
if test "${gcc_cv_as_powerpc_power9+set}" = set; then :
$as_echo_n "(cached) " >&6
else
gcc_cv_as_powerpc_power9=no
if test $in_tree_gas = yes; then
if test $gcc_cv_gas_vers -ge `expr \( \( 2 \* 1000 \) + 19 \) \* 1000 + 2`
then gcc_cv_as_powerpc_power9=yes
fi
elif test x$gcc_cv_as != x; then
$as_echo "$conftest_s" > conftest.s
if { ac_try='$gcc_cv_as $gcc_cv_as_flags -a32 -o conftest.o conftest.s >&5'
{ { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
(eval $ac_try) 2>&5
ac_status=$?
$as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
test $ac_status = 0; }; }
then
gcc_cv_as_powerpc_power9=yes
else
echo "configure: failed program was" >&5
cat conftest.s >&5
fi
rm -f conftest.o conftest.s
fi
fi
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_powerpc_power9" >&5
$as_echo "$gcc_cv_as_powerpc_power9" >&6; }
if test $gcc_cv_as_powerpc_power9 = yes; then
$as_echo "#define HAVE_AS_POWER9 1" >>confdefs.h
fi

View file

@ -4523,51 +4523,6 @@ gd:
[AC_DEFINE(HAVE_AS_MFCRF, 1,
[Define if your assembler supports mfcr field.])])
case $target in
*-*-aix*) conftest_s=' .machine "pwr5"
.csect .text[[PR]]
popcntb 3,3';;
*) conftest_s=' .machine power5
.text
popcntb 3,3';;
esac
gcc_GAS_CHECK_FEATURE([popcntb support],
gcc_cv_as_powerpc_popcntb, [2,17,0],,
[$conftest_s],,
[AC_DEFINE(HAVE_AS_POPCNTB, 1,
[Define if your assembler supports popcntb field.])])
case $target in
*-*-aix*) conftest_s=' .machine "pwr5x"
.csect .text[[PR]]
frin 1,1';;
*) conftest_s=' .machine power5
.text
frin 1,1';;
esac
gcc_GAS_CHECK_FEATURE([fp round support],
gcc_cv_as_powerpc_fprnd, [2,17,0],,
[$conftest_s],,
[AC_DEFINE(HAVE_AS_FPRND, 1,
[Define if your assembler supports fprnd.])])
case $target in
*-*-aix*) conftest_s=' .machine "pwr6"
.csect .text[[PR]]
mffgpr 1,3';;
*) conftest_s=' .machine power6
.text
mffgpr 1,3';;
esac
gcc_GAS_CHECK_FEATURE([move fp gpr support],
gcc_cv_as_powerpc_mfpgpr, [2,19,2],,
[$conftest_s],,
[AC_DEFINE(HAVE_AS_MFPGPR, 1,
[Define if your assembler supports mffgpr and mftgpr.])])
case $target in
*-*-aix*) conftest_s=' .csect .text[[PR]]
LCF..0:
@ -4587,36 +4542,6 @@ LCF0:
[AC_DEFINE(HAVE_AS_REL16, 1,
[Define if your assembler supports R_PPC_REL16 relocs.])])
case $target in
*-*-aix*) conftest_s=' .machine "pwr6"
.csect .text[[PR]]
cmpb 3,4,5';;
*) conftest_s=' .machine power6
.text
cmpb 3,4,5';;
esac
gcc_GAS_CHECK_FEATURE([compare bytes support],
gcc_cv_as_powerpc_cmpb, [2,19,2], -a32,
[$conftest_s],,
[AC_DEFINE(HAVE_AS_CMPB, 1,
[Define if your assembler supports cmpb.])])
case $target in
*-*-aix*) conftest_s=' .machine "pwr6"
.csect .text[[PR]]
dadd 1,2,3';;
*) conftest_s=' .machine power6
.text
dadd 1,2,3';;
esac
gcc_GAS_CHECK_FEATURE([decimal float support],
gcc_cv_as_powerpc_dfp, [2,19,2], -a32,
[$conftest_s],,
[AC_DEFINE(HAVE_AS_DFP, 1,
[Define if your assembler supports DFP instructions.])])
case $target in
*-*-aix*) conftest_s=' .machine "pwr7"
.csect .text[[PR]]
@ -4632,47 +4557,6 @@ LCF0:
[AC_DEFINE(HAVE_AS_VSX, 1,
[Define if your assembler supports VSX instructions.])])
case $target in
*-*-aix*) conftest_s=' .machine "pwr7"
.csect .text[[PR]]
popcntd 3,3';;
*) conftest_s=' .machine power7
.text
popcntd 3,3';;
esac
gcc_GAS_CHECK_FEATURE([popcntd support],
gcc_cv_as_powerpc_popcntd, [2,19,2], -a32,
[$conftest_s],,
[AC_DEFINE(HAVE_AS_POPCNTD, 1,
[Define if your assembler supports POPCNTD instructions.])])
case $target in
*-*-aix*) conftest_s=' .machine "pwr8"
.csect .text[[PR]]';;
*) conftest_s=' .machine power8
.text';;
esac
gcc_GAS_CHECK_FEATURE([power8 support],
gcc_cv_as_powerpc_power8, [2,19,2], -a32,
[$conftest_s],,
[AC_DEFINE(HAVE_AS_POWER8, 1,
[Define if your assembler supports POWER8 instructions.])])
case $target in
*-*-aix*) conftest_s=' .machine "pwr9"
.csect .text[[PR]]';;
*) conftest_s=' .machine power9
.text';;
esac
gcc_GAS_CHECK_FEATURE([power9 support],
gcc_cv_as_powerpc_power9, [2,19,2], -a32,
[$conftest_s],,
[AC_DEFINE(HAVE_AS_POWER9, 1,
[Define if your assembler supports POWER9 instructions.])])
case $target in
*-*-aix*) conftest_s=' .csect .text[[PR]]
lwsync';;