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[AArch64] Fix aarch64_rtx_costs of PLUS/MINUS

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On behalf of Wilco Dijkstra

2015-05-01  Wilco Dijkstra  <wdijkstr@arm.com>

	* gcc/config/aarch64/aarch64.c (aarch64_rtx_costs):
	Calculate cost of op0 and op1 in PLUS and MINUS cases.

From-SVN: r222676
This commit is contained in:
Wilco Dijkstra 2015-05-01 12:52:34 +00:00 • committed by Kyrylo Tkachov
parent 1d15ed75ab
commit 23cb661888
2 changed files with 10 additions and 7 deletions
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5
gcc/ChangeLog
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@ -1,3 +1,8 @@
2015-05-01 Wilco Dijkstra <wdijkstr@arm.com>
* gcc/config/aarch64/aarch64.c (aarch64_rtx_costs):
Calculate cost of op0 and op1 in PLUS and MINUS cases.
2015-05-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.c (aarch64_rtx_costs, COMPARE case):

12
gcc/config/aarch64/aarch64.c
View file

@ -5880,6 +5880,8 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
op1 = XEXP (x, 1);
cost_minus:
*cost += rtx_cost (op0, MINUS, 0, speed);
/* Detect valid immediates. */
if ((GET_MODE_CLASS (mode) == MODE_INT
|| (GET_MODE_CLASS (mode) == MODE_CC
@ -5887,13 +5889,10 @@ cost_minus:
&& CONST_INT_P (op1)
&& aarch64_uimm12_shift (INTVAL (op1)))
{
*cost += rtx_cost (op0, MINUS, 0, speed);
if (speed)
/* SUB(S) (immediate). */
*cost += extra_cost->alu.arith;
return true;
}
/* Look for SUB (extended register). */
@ -5918,7 +5917,6 @@ cost_minus:
*cost += aarch64_rtx_mult_cost (new_op1, MULT,
(enum rtx_code) code,
speed);
*cost += rtx_cost (op0, MINUS, 0, speed);
return true;
}
@ -5965,6 +5963,8 @@ cost_plus:
return true;
}
*cost += rtx_cost (op1, PLUS, 1, speed);
/* Look for ADD (extended register). */
if (aarch64_rtx_arith_op_extract_p (op0, mode))
{
@ -5986,12 +5986,10 @@ cost_plus:
{
*cost += aarch64_rtx_mult_cost (new_op0, MULT, PLUS,
speed);
*cost += rtx_cost (op1, PLUS, 1, speed);
return true;
}
*cost += (rtx_cost (new_op0, PLUS, 0, speed)
+ rtx_cost (op1, PLUS, 1, speed));
*cost += rtx_cost (new_op0, PLUS, 0, speed);
if (speed)
{