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sse.md (*vcvtps2ph_store<mask_name>): Use v constraint instead of x constraint.

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* config/i386/sse.md (*vcvtps2ph_store<mask_name>): Use v constraint
	instead of x constraint.
	(vcvtps2ph256<mask_name>): Likewise.

	* gcc.target/i386/avx512vl-vcvtps2ph-3.c: New test.

From-SVN: r236765
This commit is contained in:
Jakub Jelinek 2016-05-26 10:45:49 +02:00 • committed by Jakub Jelinek
parent 305aef090c
commit 2116e19f83
4 changed files with 50 additions and 3 deletions
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4
gcc/ChangeLog
View file

@ -1,5 +1,9 @@
2016-05-26 Jakub Jelinek <jakub@redhat.com>
* config/i386/sse.md (*vcvtps2ph_store<mask_name>): Use v constraint
instead of x constraint.
(vcvtps2ph256<mask_name>): Likewise.
* config/i386/sse.md (*ssse3_palignr<mode>_perm): Add avx512bw
alternative. Formatting fix.

6
gcc/config/i386/sse.md
View file

@ -18335,7 +18335,7 @@
(define_insn "*vcvtps2ph_store<mask_name>"
[(set (match_operand:V4HI 0 "memory_operand" "=m")
(unspec:V4HI [(match_operand:V4SF 1 "register_operand" "x")
(unspec:V4HI [(match_operand:V4SF 1 "register_operand" "v")
(match_operand:SI 2 "const_0_to_255_operand" "N")]
UNSPEC_VCVTPS2PH))]
"TARGET_F16C || TARGET_AVX512VL"
@ -18345,8 +18345,8 @@
(set_attr "mode" "V4SF")])
(define_insn "vcvtps2ph256<mask_name>"
[(set (match_operand:V8HI 0 "nonimmediate_operand" "=xm")
(unspec:V8HI [(match_operand:V8SF 1 "register_operand" "x")
[(set (match_operand:V8HI 0 "nonimmediate_operand" "=vm")
(unspec:V8HI [(match_operand:V8SF 1 "register_operand" "v")
(match_operand:SI 2 "const_0_to_255_operand" "N")]
UNSPEC_VCVTPS2PH))]
"TARGET_F16C || TARGET_AVX512VL"

2
gcc/testsuite/ChangeLog
View file

@ -1,5 +1,7 @@
2016-05-26 Jakub Jelinek <jakub@redhat.com>
* gcc.target/i386/avx512vl-vcvtps2ph-3.c: New test.
* gcc.target/i386/avx512bw-vpalignr-4.c: New test.
* gcc.target/i386/avx512vl-vpalignr-4.c: New test.

41
gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2ph-3.c Normal file
View file

@ -0,0 +1,41 @@
/* { dg-do compile { target { ! ia32 } } } */
/* { dg-options "-O2 -mf16c -mavx512vl -masm=att" } */
#include <x86intrin.h>
void
f1 (__m128 x)
{
register __m128 a __asm ("xmm16");
register __m128i b __asm ("xmm17");
a = x;
asm volatile ("" : "+v" (a));
b = _mm_cvtps_ph (a, 1);
asm volatile ("" : "+v" (b));
}
/* { dg-final { scan-assembler "vcvtps2ph\[^\n\r]*\\\$1\[^\n\r]*%xmm16\[^\n\r]*%xmm17" } } */
void
f2 (__m256 x)
{
register __m256 a __asm ("xmm16");
register __m128i b __asm ("xmm17");
a = x;
asm volatile ("" : "+v" (a));
b = _mm256_cvtps_ph (a, 1);
asm volatile ("" : "+v" (b));
}
/* { dg-final { scan-assembler "vcvtps2ph\[^\n\r]*\\\$1\[^\n\r]*%ymm16\[^\n\r]*%xmm17" } } */
void
f3 (__m256 x, __v8hi *y)
{
register __m256 a __asm ("xmm16");
a = x;
asm volatile ("" : "+v" (a));
*y = (__v8hi) _mm256_cvtps_ph (a, 1);
}
/* { dg-final { scan-assembler "vcvtps2ph\[^\n\r]*\\\$1\[^\n\r]*%ymm16\[^\n\r]*%rdi" } } */