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MIPS16: Mark $2/$3 as clobbered if GP is used

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PR Target/84790.
The gp init sequence
        li      $2,%hi(_gp_disp)
        addiu   $3,$pc,%lo(_gp_disp)
        sll     $2,16
        addu    $2,$3
is generated directly in `mips_output_function_prologue`, and does
not appear in the RTL.

So the IRA/IPA passes are not aware that $2/$3 have been clobbered,
so they may be used for cross (local) function call.

Let's mark $2/$3 clobber both:
  - Just after the UNSPEC_GP RTL of a function;
  - Just after a function call.

Reported-by: Matthias Schiffer <mschiffer@universe-factory.net>
Origin-Patch-by: Felix Fietkau <nbd@nbd.name>.

gcc
	* config/mips/mips.cc(mips16_gp_pseudo_reg): Mark
	MIPS16_PIC_TEMP and MIPS_PROLOGUE_TEMP clobbered.
	(mips_emit_call_insn): Mark MIPS16_PIC_TEMP and
	MIPS_PROLOGUE_TEMP clobbered if MIPS16 and CALL_CLOBBERED_GP.

(cherry picked from commit 915440eed21de367cb41857afb5273aff5bcb737)
This commit is contained in:
YunQiang Su 2024-05-29 02:28:25 +08:00
parent 8f6c56cda5
commit 201cfa7255
1 changed files with 10 additions and 1 deletions
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11
gcc/config/mips/mips.cc
View file

@ -3233,6 +3233,9 @@ mips_emit_call_insn (rtx pattern, rtx orig_addr, rtx addr, bool lazy_p)
{
rtx post_call_tmp_reg = gen_rtx_REG (word_mode, POST_CALL_TMP_REG);
clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), post_call_tmp_reg);
clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS16_PIC_TEMP);
clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn),
MIPS_PROLOGUE_TEMP (word_mode));
}
return insn;
@ -3329,7 +3332,13 @@ mips16_gp_pseudo_reg (void)
rtx set = gen_load_const_gp (cfun->machine->mips16_gp_pseudo_rtx);
rtx_insn *insn = emit_insn_after (set, scan);
INSN_LOCATION (insn) = 0;
/* NewABI support hasn't been implement. NewABI should generate RTL
sequence instead of ASM sequence directly. */
if (mips_current_loadgp_style () == LOADGP_OLDABI)
{
emit_clobber (MIPS16_PIC_TEMP);
emit_clobber (MIPS_PROLOGUE_TEMP (Pmode));
}
pop_topmost_sequence ();
}