sh.h (SH_ASM_SPEC): Handle m1, m2*, m3* and m4* cases.
* config/sh/sh.h (SH_ASM_SPEC): Handle m1, m2*, m3* and m4* cases. From-SVN: r210033
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@ -1,3 +1,7 @@
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2014-05-03 Oleg Endo <olegendo@gcc.gnu.org>
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* config/sh/sh.h (SH_ASM_SPEC): Handle m1, m2*, m3* and m4* cases.
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2014-05-03 Oleg Endo <olegendo@gcc.gnu.org>
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* config/sh/sh.h (ROUND_ADVANCE): Delete macro.
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@ -267,9 +267,25 @@ extern int code_for_indirect_jump_scratch;
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#define SUBTARGET_ASM_RELAX_SPEC "%{m4*:-isa=sh4-up}"
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#endif
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/* Define which ISA type to pass to the assembler.
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For SH4 we pass SH4A to allow using some instructions that are available
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on some SH4 variants, but officially are part of the SH4A ISA. */
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#define SH_ASM_SPEC \
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"%(subtarget_asm_endian_spec) %{mrelax:-relax %(subtarget_asm_relax_spec)} \
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%(subtarget_asm_isa_spec) %(subtarget_asm_spec) \
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%{m1:--isa=sh} \
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%{m2:--isa=sh2} \
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%{m2e:--isa=sh2e} \
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%{m3:--isa=sh3} \
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%{m3e:--isa=sh3e} \
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%{m4:--isa=sh4a} \
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%{m4-single:--isa=sh4a} \
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%{m4-single-only:--isa=sh4a} \
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%{m4-nofpu:--isa=sh4a-nofpu} \
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%{m4a:--isa=sh4a} \
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%{m4a-single:--isa=sh4a} \
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%{m4a-single-only:--isa=sh4a} \
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%{m4a-nofpu:--isa=sh4a-nofpu} \
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%{m2a:--isa=sh2a} \
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%{m2a-single:--isa=sh2a} \
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%{m2a-single-only:--isa=sh2a} \
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