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rs6000.c (rs6k_nonimmediate_operand): Rename to rs6000_nonimmediate_operand.

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* config/rs6000/rs6000.c (rs6k_nonimmediate_operand): Rename
        to rs6000_nonimmediate_operand.
        * config/rs6000/rs6000.h (PREDICATE_CODES): Rename
        rs6k_nonimmediate_operand to rs6000_nonimmediate_operand.
        * config/rs6000/rs6000.md (movsi_internal1): Rename predicate to
        rs6000_nonimmediate_operand.
        * config/rs6000/spe.md (movdf_e500_double): Rename predicate to
        rs6000_nonimmediate_operand.

From-SVN: r93682
This commit is contained in:
David Edelsohn 2005-01-15 04:03:10 +00:00 • committed by David Edelsohn
parent 95f16434b0
commit 165a5bad87
5 changed files with 15 additions and 4 deletions
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11
gcc/ChangeLog
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@ -1,3 +1,14 @@
2005-01-14 David Edelsohn <edelsohn@gnu.org>
* config/rs6000/rs6000.c (rs6k_nonimmediate_operand): Rename
to rs6000_nonimmediate_operand.
* config/rs6000/rs6000.h (PREDICATE_CODES): Rename
rs6k_nonimmediate_operand to rs6000_nonimmediate_operand.
* config/rs6000/rs6000.md (movsi_internal1): Rename predicate to
rs6000_nonimmediate_operand.
* config/rs6000/spe.md (movdf_e500_double): Rename predicate to
rs6000_nonimmediate_operand.
2005-01-14 Andrew Pinski <pinskia@physics.uc.edu>
* tree-ssa-alias.c (pass_may_alias): Add TODO_verify_stmts.

2
gcc/config/rs6000/rs6000.c
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@ -3060,7 +3060,7 @@ invalid_e500_subreg (rtx op, enum machine_mode mode)
/* Just like nonimmediate_operand, but return 0 for invalid SUBREG's
on the e500. */
int
rs6k_nonimmediate_operand (rtx op, enum machine_mode mode)
rs6000_nonimmediate_operand (rtx op, enum machine_mode mode)
{
if (TARGET_E500_DOUBLE
&& GET_CODE (op) == SUBREG

2
gcc/config/rs6000/rs6000.h
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@ -2592,7 +2592,7 @@ extern char rs6000_reg_names[][8]; /* register names (0 vs. %r0). */
{"current_file_function_operand", {SYMBOL_REF}}, \
{"input_operand", {SUBREG, MEM, REG, CONST_INT, \
CONST_DOUBLE, SYMBOL_REF}}, \
{"rs6k_nonimmediate_operand", {SUBREG, MEM, REG}}, \
{"rs6000_nonimmediate_operand", {SUBREG, MEM, REG}}, \
{"load_multiple_operation", {PARALLEL}}, \
{"store_multiple_operation", {PARALLEL}}, \
{"lmw_operation", {PARALLEL}}, \

2
gcc/config/rs6000/rs6000.md
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@ -7709,7 +7709,7 @@
(set_attr "length" "4")])
(define_insn "*movsi_internal1"
[(set (match_operand:SI 0 "rs6k_nonimmediate_operand" "=r,r,r,m,r,r,r,r,r,*q,*c*l,*h,*h")
[(set (match_operand:SI 0 "rs6000_nonimmediate_operand" "=r,r,r,m,r,r,r,r,r,*q,*c*l,*h,*h")
(match_operand:SI 1 "input_operand" "r,U,m,r,I,L,n,R,*h,r,r,r,0"))]
"gpc_reg_operand (operands[0], SImode)
|| gpc_reg_operand (operands[1], SImode)"

2
gcc/config/rs6000/spe.md
View file

@ -2230,7 +2230,7 @@
;; FIXME: Allow r=CONST0.
(define_insn "*movdf_e500_double"
[(set (match_operand:DF 0 "rs6k_nonimmediate_operand" "=r,r,m")
[(set (match_operand:DF 0 "rs6000_nonimmediate_operand" "=r,r,m")
(match_operand:DF 1 "input_operand" "r,m,r"))]
"TARGET_HARD_FLOAT && TARGET_E500_DOUBLE
&& (gpc_reg_operand (operands[0], DFmode)