middle-end/102682 - avoid invalid subreg on the LHS

The following avoids generating

(insn 6 5 7 2 (set (subreg:OI (concatn/v:TI [
                    (reg:DI 92 [ buffer ])
                    (reg:DI 93 [ buffer+8 ])
                ]) 0)
        (subreg:OI (reg/v:V8SI 85 [ __x ]) 0)) "t.ii":76:21 74 {*movoi_internal_avx}
     (nil))

via store_bit_field_1 when we try to store excess data into
a register allocated temporary.  The case was supposed to

      /* Use the subreg machinery either to narrow OP0 to the required
         words...

but the check ensured only an register-aligned but not a large
enough piece.  The following adds such missed check which ends up
decomposing the set to

(insn 6 5 7 (set (subreg:DI (reg/v:TI 84 [ buffer ]) 0)
        (subreg:DI (reg/v:V8SI 85 [ __x ]) 0)) "t.ii":76:21 -1
     (nil))

(insn 7 6 0 (set (subreg:DI (reg/v:TI 84 [ buffer ]) 8)
        (subreg:DI (reg/v:V8SI 85 [ __x ]) 8)) "t.ii":76:21 -1
     (nil))

2021-10-11  Richard Biener  <rguenther@suse.de>

	PR middle-end/102682
	* expmed.c (store_bit_field_1): Ensure a LHS subreg would
	not create a paradoxical subreg.
This commit is contained in:
Richard Biener 2021-10-11 14:08:52 +02:00
parent 575191b976
commit 147ed0184f

View file

@ -806,7 +806,8 @@ store_bit_field_1 (rtx str_rtx, poly_uint64 bitsize, poly_uint64 bitnum,
}
}
else if (constant_multiple_p (bitnum, regsize * BITS_PER_UNIT, &regnum)
&& multiple_p (bitsize, regsize * BITS_PER_UNIT))
&& multiple_p (bitsize, regsize * BITS_PER_UNIT)
&& known_ge (GET_MODE_BITSIZE (GET_MODE (op0)), bitsize))
{
sub = simplify_gen_subreg (fieldmode, op0, GET_MODE (op0),
regnum * regsize);