FreeChainXenon/gcc
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

expmed.c (extract_bit_field): Reverse operands of && condition to prevent a potential division by zero in the...

Browse source 
* expmed.c (extract_bit_field): Reverse operands of && condition to
        prevent a potential division by zero in the previously first branch.
	* config/pa/pa.md (extv, extzv): FAIL if the bitfield length is zero.

From-SVN: r65907
This commit is contained in:
Olivier Hainque 2003-04-21 23:32:06 +02:00 • committed by Richard Kenner
parent d79f9ec9ff
commit 0d2f38ee40
3 changed files with 31 additions and 19 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
gcc/ChangeLog
View file

@ -3,6 +3,10 @@
* calls.c (expand_call): Prevent sibcall optimization for calls to
nested subprograms.
* expmed.c (extract_bit_field): Reverse operands of && condition to
prevent a potential division by zero in the previously first branch.
* config/pa/pa.md (extv, extzv): FAIL if the bitfield length is zero.
2003-04-21 Joel Brobecker <brobecker@gnat.com>
* dwarf2out.c (is_ada, is_ada_subrange_type): New functions.

8
gcc/config/pa/pa.md
View file

@ -7153,6 +7153,10 @@
""
"
{
/* PA extraction insns don't support zero length bitfields. */
if (INTVAL (operands[2]) == 0)
FAIL;
if (TARGET_64BIT)
emit_insn (gen_extzv_64 (operands[0], operands[1],
operands[2], operands[3]));
@ -7215,6 +7219,10 @@
""
"
{
/* PA extraction insns don't support zero length bitfields. */
if (INTVAL (operands[2]) == 0)
FAIL;
if (TARGET_64BIT)
emit_insn (gen_extv_64 (operands[0], operands[1],
operands[2], operands[3]));

38
gcc/expmed.c
View file

@ -1104,25 +1104,25 @@ extract_bit_field (str_rtx, bitsize, bitnum, unsignedp,
? mode
: mode_for_size (bitsize, GET_MODE_CLASS (tmode), 0));
if (((GET_CODE (op0) != MEM
&& TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
GET_MODE_BITSIZE (GET_MODE (op0)))
&& GET_MODE_SIZE (mode1) != 0
&& byte_offset % GET_MODE_SIZE (mode1) == 0)
|| (GET_CODE (op0) == MEM
&& (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (op0))
|| (offset * BITS_PER_UNIT % bitsize == 0
&& MEM_ALIGN (op0) % bitsize == 0))))
&& ((bitsize >= BITS_PER_WORD && bitsize == GET_MODE_BITSIZE (mode)
&& bitpos % BITS_PER_WORD == 0)
|| (mode_for_size (bitsize, GET_MODE_CLASS (tmode), 0) != BLKmode
/* ??? The big endian test here is wrong. This is correct
if the value is in a register, and if mode_for_size is not
the same mode as op0. This causes us to get unnecessarily
inefficient code from the Thumb port when -mbig-endian. */
&& (BYTES_BIG_ENDIAN
? bitpos + bitsize == BITS_PER_WORD
: bitpos == 0))))
if (((bitsize >= BITS_PER_WORD && bitsize == GET_MODE_BITSIZE (mode)
&& bitpos % BITS_PER_WORD == 0)
|| (mode_for_size (bitsize, GET_MODE_CLASS (tmode), 0) != BLKmode
/* ??? The big endian test here is wrong. This is correct
if the value is in a register, and if mode_for_size is not
the same mode as op0. This causes us to get unnecessarily
inefficient code from the Thumb port when -mbig-endian. */
&& (BYTES_BIG_ENDIAN
? bitpos + bitsize == BITS_PER_WORD
: bitpos == 0)))
&& ((GET_CODE (op0) != MEM
&& TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
GET_MODE_BITSIZE (GET_MODE (op0)))
&& GET_MODE_SIZE (mode1) != 0
&& byte_offset % GET_MODE_SIZE (mode1) == 0)
|| (GET_CODE (op0) == MEM
&& (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (op0))
|| (offset * BITS_PER_UNIT % bitsize == 0
&& MEM_ALIGN (op0) % bitsize == 0)))))
{
if (mode1 != GET_MODE (op0))
{