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RISC-V: Remove unnecessary asm check for vec cvt

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The vsetvl asm check is unnecessary for the vector convert. We
should be focus for constrait and leave the vsetvl test to the
vsetvl pass.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/unop/cvt-0.c: Remove the vsetvl
	asm check from func body.
	* gcc.target/riscv/rvv/autovec/unop/cvt-1.c: Ditto.

Signed-off-by: Pan Li <pan2.li@intel.com>
This commit is contained in:
Pan Li 2023-10-23 17:53:20 +08:00
parent 0093821426
commit 09c9de0607
2 changed files with 2 additions and 4 deletions
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3
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/cvt-0.c
View file

@ -7,9 +7,8 @@
/*
** test_int65_to_fp16:
** ...
** vsetvli\s+[atx][0-9]+,\s*zero,\s*e32,\s*mf2,\s*ta,\s*ma
** vfncvt\.f\.x\.w\s+v[0-9]+,\s*v[0-9]+
** vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*ta,\s*ma
** ...
** vfncvt\.f\.f\.w\s+v[0-9]+,\s*v[0-9]+
** ...
*/

3
gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/cvt-1.c
View file

@ -7,9 +7,8 @@
/*
** test_uint65_to_fp16:
** ...
** vsetvli\s+[atx][0-9]+,\s*zero,\s*e32,\s*mf2,\s*ta,\s*ma
** vfncvt\.f\.xu\.w\s+v[0-9]+,\s*v[0-9]+
** vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*ta,\s*ma
** ...
** vfncvt\.f\.f\.w\s+v[0-9]+,\s*v[0-9]+
** ...
*/