rs6000: Add split pattern to replace
7: r120:V4SI=const_vector 8: r121:V4SI=unspec[r120:V4SI,r120:V4SI,0xc] 260 with r121:v4SI = r120:V4SI when r120 is a vector with same element. gcc/ChangeLog: * config/rs6000/altivec.md (sldoi_to_mov<mode>): New. gcc/testsuite/ChangeLog: * gcc.target/powerpc/sldoi_to_mov.c: New test.
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@ -383,6 +383,17 @@
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}
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})
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(define_insn_and_split "sldoi_to_mov<mode>"
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[(set (match_operand:VM 0 "altivec_register_operand")
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(unspec:VM [(match_operand:VM 1 "easy_vector_constant")
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(match_dup 1)
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(match_operand:QI 2 "u5bit_cint_operand")]
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UNSPEC_VSLDOI))]
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"VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode) && can_create_pseudo_p ()"
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"#"
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"&& 1"
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[(set (match_dup 0) (match_dup 1))])
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(define_insn "get_vrsave_internal"
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[(set (match_operand:SI 0 "register_operand" "=r")
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(unspec:SI [(reg:SI VRSAVE_REGNO)] UNSPEC_GET_VRSAVE))]
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15
gcc/testsuite/gcc.target/powerpc/sldoi_to_mov.c
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15
gcc/testsuite/gcc.target/powerpc/sldoi_to_mov.c
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/* { dg-do compile } */
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/* { dg-options "-O2" } */
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#include <altivec.h>
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vector signed int foo1 (vector signed int a) {
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vector signed int b = {0};
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return vec_sum2s(a, b);
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}
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vector signed int foo2 (vector signed int a) {
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vector signed int b = {0};
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return vec_sld(b, b, 4);
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}
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/* { dg-final { scan-assembler-times {\mvsldoi\M} 1 {target le} } } */
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