FreeChainXenon/binutils-gdb
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binutils-gdb/sim/riscv
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Mike Frysinger d026e67ed4 sim: move register headers into sim/ namespace [PR sim/29869] 
These headers define the register numbers for each port to implement
the sim_fetch_register & sim_store_register interfaces.  While gdb
uses these, the APIs are part of the sim, not gdb.  Move the headers
out of the gdb/ include namespace and into sim/ instead.
2022-12-20 21:06:32 -05:00
..
acinclude.m4 sim: riscv: add missing AC_MSG_RESULT call 2022-11-07 23:44:36 +07:00
ChangeLog-2021 sim: rename ChangeLog files to ChangeLog-2021 2021-08-17 20:27:36 -04:00
interp.c Automatic Copyright Year update after running gdb/copyright.py 2022-01-01 19:13:23 +04:00
local.mk sim: run: move linking into top-level 2022-11-05 20:00:56 +07:00
machs.c Automatic Copyright Year update after running gdb/copyright.py 2022-01-01 19:13:23 +04:00
machs.h Automatic Copyright Year update after running gdb/copyright.py 2022-01-01 19:13:23 +04:00
Makefile.in sim: riscv: drop subdir configure logic 2022-11-07 23:24:46 +07:00
model_list.def
sim-main.c sim: move register headers into sim/ namespace [PR sim/29869] 2022-12-20 21:06:32 -05:00
sim-main.h Automatic Copyright Year update after running gdb/copyright.py 2022-01-01 19:13:23 +04:00