
Most tdep/nat files are named: <cpu>-<os>-tdep.c <cpu>-<os>-nat.c A few files do not respect this scheme. This patch renames them so that they are consistent with the rest of the files. It builds fine with --enable-targets=all, but that doesn't test the nat files. I can only hope that my grep skill is good enough. gdb/ChangeLog: * Makefile.in (ALL_64_TARGET_OBS, ALL_TARGET_OBS, HFILES_NO_SRCDIR, ALLDEPFILES): Rename files. * alphabsd-nat.c: Rename to ... * alpha-bsd-nat.c: ... this, adjust include. * alphabsd-tdep.c: Rename to ... * alpha-bsd-tdep.c: ... this, adjust include. * alphabsd-tdep.h: Rename to ... * alpha-bsd-tdep.h: ... this, adjust include barrier and comment. * alphafbsd-tdep.c: Rename to ... * alpha-fbsd-tdep.c: ... this. * alphanbsd-tdep.c: Rename to ... * alpha-nbsd-tdep.c: ... this, adjust include. * alphaobsd-tdep.c: Rename to ... * alpha-obsd-tdep.c: ... this, adjust include. * amd64bsd-nat.c: Rename to ... * amd64-bsd-nat.c: ... this, adjust include. * amd64fbsd-nat.c: Rename to ... * amd64-fbsd-nat.c: ... this, adjust include. * amd64fbsd-tdep.c: Rename to ... * amd64-fbsd-tdep.c: ... this, adjust include. * amd64nbsd-nat.c: Rename to ... * amd64-nbsd-nat.c: ... this. * amd64nbsd-tdep.c: Rename to ... * amd64-nbsd-tdep.c: ... this. * amd64obsd-nat.c: Rename to ... * amd64-obsd-nat.c: ... this. * amd64obsd-tdep.c: Rename to ... * amd64-obsd-tdep.c: ... this. * amd64-tdep.h: Update comments. * armbsd-tdep.c: Rename to ... * arm-bsd-tdep.c: ... this. * armnbsd-nat.c: Rename to ... * arm-nbsd-nat.c: ... this. * armnbsd-tdep.c: Rename to ... * arm-nbsd-tdep.c: ... this. * armobsd-tdep.c: Rename to ... * arm-obsd-tdep.c: ... this. * arm-tdep.h: Update comments. * hppabsd-tdep.c: Rename to ... * hppa-bsd-tdep.c: ... this, adjust include. * hppabsd-tdep.h: Rename to ... * hppa-bsd-tdep.h: ... this, adjust include barrier and comment. * hppanbsd-nat.c: Rename to ... * hppa-nbsd-nat.c: ... this. * hppanbsd-tdep.c: Rename to ... * hppa-nbsd-tdep.c: ... this, adjust include. * hppaobsd-nat.c: Rename to ... * hppa-obsd-nat.c: ... this. * hppaobsd-tdep.c: Rename to ... * hppa-obsd-tdep.c: ... this, adjust include. * i386bsd-nat.c: Rename to ... * i386-bsd-nat.c: ... this, adjust include. * i386bsd-nat.h: Rename to ... * i386-bsd-nat.h: ... this, adjust include barrier and comment. * i386bsd-tdep.c: Rename to ... * i386-bsd-tdep.c: ... this. * i386fbsd-nat.c: Rename to ... * i386-fbsd-nat.c: ... this, adjust include. * i386fbsd-tdep.c: Rename to ... * i386-fbsd-tdep.c: ... this, adjust include. * i386fbsd-tdep.h: Rename to ... * i386-fbsd-tdep.h: ... this, adjust include barrier and comment. * i386gnu-nat.c: Rename to ... * i386-gnu-nat.c: ... this. * i386gnu-tdep.c: Rename to ... * i386-gnu-tdep.c: ... this. * i386nbsd-nat.c: Rename to ... * i386-nbsd-nat.c: ... this, adjust include. * i386nbsd-tdep.c: Rename to ... * i386-nbsd-tdep.c: ... this. * i386obsd-nat.c: Rename to ... * i386-obsd-nat.c: ... this, adjust include. * i386obsd-tdep.c: Rename to ... * i386-obsd-tdep.c: ... this. * i386v4-nat.c: Rename to ... * i386-v4-nat.c: ... this. * i386-tdep.h: Update comments. * m68k-tdep.h: Update comments. * m68kbsd-nat.c: Rename to ... * m68k-bsd-nat.c: ... this. * m68kbsd-tdep.c: Rename to ... * m68k-bsd-tdep.c: ... this. * m68klinux-nat.c: Rename to ... * m68k-linux-nat.c: ... this. * m68klinux-tdep.c: Rename to ... * m68k-linux-tdep.c: ... this. * m88kbsd-nat.c: Rename to ... * m88k-bsd-nat.c: ... this. * mipsnbsd-nat.c: Rename to ... * mips-nbsd-nat.c: ... this, adjust include. * mipsnbsd-tdep.c: Rename to ... * mips-nbsd-tdep.c: ... this, adjust include. * mipsnbsd-tdep.h: Rename to ... * mips-nbsd-tdep.h: ... this, adjust include barrier and comment. * mips64obsd-nat.c: Rename to ... * mips64-obsd-nat.c: ... this. * mips64obsd-tdep.c: Rename to ... * mips64-obsd-tdep.c: ... this. * ppcfbsd-nat.c: Rename to ... * ppc-fbsd-nat.c: ... this, adjust include. * ppcfbsd-tdep.c: Rename to ... * ppc-fbsd-tdep.c: ... this, adjust include. * ppcfbsd-tdep.h: Rename to ... * ppc-fbsd-tdep.h: ... this, adjust include barrier and comment. * ppcnbsd-nat.c: Rename to ... * ppc-nbsd-nat.c: ... this, adjust include. * ppcnbsd-tdep.c: Rename to ... * ppc-nbsd-tdep.c: ... this, adjust include. * ppcnbsd-tdep.h: Rename to ... * ppc-nbsd-tdep.h: ... this, adjust include barrier and comment. * ppcobsd-nat.c: Rename to ... * ppc-obsd-nat.c: ... this, adjust include. * ppcobsd-tdep.c: Rename to ... * ppc-obsd-tdep.c: ... this, adjust include. * ppcobsd-tdep.h: Rename to ... * ppc-obsd-tdep.h: ... this, adjust include barrier and comment. * shnbsd-nat.c: Rename to ... * sh-nbsd-nat.c: ... this. * shnbsd-tdep.c: Rename to ... * sh-nbsd-tdep.c: ... this. * sparcnbsd-nat.c: Rename to ... * sparc-nbsd-nat.c: ... this. * sparcnbsd-tdep.c: Rename to ... * sparc-nbsd-tdep.c: ... this. * sparcobsd-tdep.c: Rename to ... * sparc-obsd-tdep.c: ... this. * sparc64fbsd-nat.c: Rename to ... * sparc64-fbsd-nat.c: ... this. * sparc64fbsd-tdep.c: Rename to ... * sparc64-fbsd-tdep.c: ... this. * sparc64nbsd-nat.c: Rename to ... * sparc64-nbsd-nat.c: ... this. * sparc64nbsd-tdep.c: Rename to ... * sparc64-nbsd-tdep.c: ... this. * sparc64obsd-nat.c: Rename to ... * sparc64-obsd-nat.c: ... this. * sparc64obsd-tdep.c: Rename to ... * sparc64-obsd-tdep.c: ... this. * sparc64-tdep.h: Update comments. * vaxbsd-nat.c: Rename to ... * vax-bsd-nat.c: ... this. * vaxnbsd-tdep.c: Rename to ... * vax-nbsd-tdep.c: ... this. * vaxobsd-tdep.c: Rename to ... * vax-obsd-tdep.c: ... this. * x86bsd-nat.h: Rename to ... * x86-bsd-nat.h: ... this, adjust include barrier and comment. * x86bsd-nat.c: Rename to ... * x86-bsd-nat.c: ... this, adjust include. * configure.tgt: Update renamed files. * config/alpha/fbsd.mh: Update renamed files. * config/alpha/nbsd.mh: Update renamed files. * config/arm/nbsdelf.mh: Update renamed files. * config/djgpp/fnchange.lst: Update renamed files. * config/i386/fbsd.mh: Update renamed files. * config/i386/fbsd64.mh: Update renamed files. * config/i386/i386gnu.mh: Update renamed files. * config/i386/i386sol2.mh: Update renamed files. * config/i386/nbsd64.mh: Update renamed files. * config/i386/nbsdelf.mh: Update renamed files. * config/i386/obsd.mh: Update renamed files. * config/i386/obsd64.mh: Update renamed files. * config/i386/sol2-64.mh: Update renamed files. * config/m68k/linux.mh: Update renamed files. * config/m68k/nbsdelf.mh: Update renamed files. * config/m68k/obsd.mh: Update renamed files. * config/m88k/obsd.mh: Update renamed files. * config/mips/nbsd.mh: Update renamed files. * config/mips/obsd64.mh: Update renamed files. * config/pa/nbsd.mh: Update renamed files. * config/pa/obsd.mh: Update renamed files. * config/powerpc/fbsd.mh: Update renamed files. * config/powerpc/nbsd.mh: Update renamed files. * config/powerpc/obsd.mh: Update renamed files. * config/sh/nbsd.mh: Update renamed files. * config/sparc/fbsd.mh: Update renamed files. * config/sparc/nbsd64.mh: Update renamed files. * config/sparc/nbsdelf.mh: Update renamed files. * config/sparc/obsd64.mh: Update renamed files. * config/vax/nbsdelf.mh: Update renamed files. * config/vax/obsd.mh: Update renamed files.
501 lines
12 KiB
C
501 lines
12 KiB
C
/* Native-dependent code for BSD Unix running on ARM's, for GDB.
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Copyright (C) 1988-2016 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "gdbcore.h"
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#include "inferior.h"
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#include "regcache.h"
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#include "target.h"
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#include <sys/types.h>
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#include <sys/ptrace.h>
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#include <machine/reg.h>
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#include <machine/frame.h>
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#include "arm-tdep.h"
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#include "inf-ptrace.h"
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extern int arm_apcs_32;
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static void
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arm_supply_gregset (struct regcache *regcache, struct reg *gregset)
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{
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int regno;
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CORE_ADDR r_pc;
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/* Integer registers. */
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for (regno = ARM_A1_REGNUM; regno < ARM_SP_REGNUM; regno++)
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regcache_raw_supply (regcache, regno, (char *) &gregset->r[regno]);
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regcache_raw_supply (regcache, ARM_SP_REGNUM,
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(char *) &gregset->r_sp);
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regcache_raw_supply (regcache, ARM_LR_REGNUM,
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(char *) &gregset->r_lr);
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/* This is ok: we're running native... */
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r_pc = gdbarch_addr_bits_remove (get_regcache_arch (regcache), gregset->r_pc);
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regcache_raw_supply (regcache, ARM_PC_REGNUM, (char *) &r_pc);
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if (arm_apcs_32)
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regcache_raw_supply (regcache, ARM_PS_REGNUM,
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(char *) &gregset->r_cpsr);
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else
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regcache_raw_supply (regcache, ARM_PS_REGNUM,
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(char *) &gregset->r_pc);
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}
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static void
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arm_supply_fparegset (struct regcache *regcache, struct fpreg *fparegset)
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{
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int regno;
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for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
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regcache_raw_supply (regcache, regno,
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(char *) &fparegset->fpr[regno - ARM_F0_REGNUM]);
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regcache_raw_supply (regcache, ARM_FPS_REGNUM,
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(char *) &fparegset->fpr_fpsr);
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}
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static void
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fetch_register (struct regcache *regcache, int regno)
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{
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struct reg inferior_registers;
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int ret;
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ret = ptrace (PT_GETREGS, ptid_get_pid (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch general register"));
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return;
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}
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switch (regno)
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{
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case ARM_SP_REGNUM:
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regcache_raw_supply (regcache, ARM_SP_REGNUM,
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(char *) &inferior_registers.r_sp);
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break;
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case ARM_LR_REGNUM:
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regcache_raw_supply (regcache, ARM_LR_REGNUM,
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(char *) &inferior_registers.r_lr);
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break;
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case ARM_PC_REGNUM:
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/* This is ok: we're running native... */
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inferior_registers.r_pc = gdbarch_addr_bits_remove
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(get_regcache_arch (regcache),
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inferior_registers.r_pc);
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regcache_raw_supply (regcache, ARM_PC_REGNUM,
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(char *) &inferior_registers.r_pc);
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break;
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case ARM_PS_REGNUM:
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if (arm_apcs_32)
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regcache_raw_supply (regcache, ARM_PS_REGNUM,
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(char *) &inferior_registers.r_cpsr);
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else
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regcache_raw_supply (regcache, ARM_PS_REGNUM,
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(char *) &inferior_registers.r_pc);
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break;
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default:
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regcache_raw_supply (regcache, regno,
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(char *) &inferior_registers.r[regno]);
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break;
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}
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}
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static void
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fetch_regs (struct regcache *regcache)
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{
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struct reg inferior_registers;
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int ret;
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int regno;
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ret = ptrace (PT_GETREGS, ptid_get_pid (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch general registers"));
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return;
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}
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arm_supply_gregset (regcache, &inferior_registers);
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}
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static void
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fetch_fp_register (struct regcache *regcache, int regno)
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{
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struct fpreg inferior_fp_registers;
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int ret;
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ret = ptrace (PT_GETFPREGS, ptid_get_pid (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch floating-point register"));
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return;
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}
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switch (regno)
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{
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case ARM_FPS_REGNUM:
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regcache_raw_supply (regcache, ARM_FPS_REGNUM,
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(char *) &inferior_fp_registers.fpr_fpsr);
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break;
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default:
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regcache_raw_supply (regcache, regno,
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(char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
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break;
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}
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}
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static void
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fetch_fp_regs (struct regcache *regcache)
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{
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struct fpreg inferior_fp_registers;
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int ret;
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int regno;
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ret = ptrace (PT_GETFPREGS, ptid_get_pid (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch general registers"));
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return;
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}
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arm_supply_fparegset (regcache, &inferior_fp_registers);
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}
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static void
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armnbsd_fetch_registers (struct target_ops *ops,
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struct regcache *regcache, int regno)
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{
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if (regno >= 0)
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{
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if (regno < ARM_F0_REGNUM || regno > ARM_FPS_REGNUM)
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fetch_register (regcache, regno);
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else
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fetch_fp_register (regcache, regno);
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}
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else
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{
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fetch_regs (regcache);
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fetch_fp_regs (regcache);
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}
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}
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static void
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store_register (const struct regcache *regcache, int regno)
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{
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struct gdbarch *gdbarch = get_regcache_arch (regcache);
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struct reg inferior_registers;
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int ret;
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ret = ptrace (PT_GETREGS, ptid_get_pid (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch general registers"));
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return;
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}
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switch (regno)
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{
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case ARM_SP_REGNUM:
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regcache_raw_collect (regcache, ARM_SP_REGNUM,
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(char *) &inferior_registers.r_sp);
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break;
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case ARM_LR_REGNUM:
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regcache_raw_collect (regcache, ARM_LR_REGNUM,
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(char *) &inferior_registers.r_lr);
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break;
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case ARM_PC_REGNUM:
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if (arm_apcs_32)
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regcache_raw_collect (regcache, ARM_PC_REGNUM,
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(char *) &inferior_registers.r_pc);
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else
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{
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unsigned pc_val;
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regcache_raw_collect (regcache, ARM_PC_REGNUM,
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(char *) &pc_val);
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pc_val = gdbarch_addr_bits_remove (gdbarch, pc_val);
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inferior_registers.r_pc ^= gdbarch_addr_bits_remove
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(gdbarch, inferior_registers.r_pc);
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inferior_registers.r_pc |= pc_val;
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}
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break;
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case ARM_PS_REGNUM:
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if (arm_apcs_32)
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regcache_raw_collect (regcache, ARM_PS_REGNUM,
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(char *) &inferior_registers.r_cpsr);
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else
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{
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unsigned psr_val;
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regcache_raw_collect (regcache, ARM_PS_REGNUM,
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(char *) &psr_val);
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psr_val ^= gdbarch_addr_bits_remove (gdbarch, psr_val);
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inferior_registers.r_pc = gdbarch_addr_bits_remove
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(gdbarch, inferior_registers.r_pc);
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inferior_registers.r_pc |= psr_val;
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}
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break;
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default:
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regcache_raw_collect (regcache, regno,
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(char *) &inferior_registers.r[regno]);
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break;
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}
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ret = ptrace (PT_SETREGS, ptid_get_pid (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_registers, 0);
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if (ret < 0)
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warning (_("unable to write register %d to inferior"), regno);
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}
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static void
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store_regs (const struct regcache *regcache)
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{
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struct gdbarch *gdbarch = get_regcache_arch (regcache);
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struct reg inferior_registers;
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int ret;
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int regno;
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for (regno = ARM_A1_REGNUM; regno < ARM_SP_REGNUM; regno++)
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regcache_raw_collect (regcache, regno,
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(char *) &inferior_registers.r[regno]);
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regcache_raw_collect (regcache, ARM_SP_REGNUM,
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(char *) &inferior_registers.r_sp);
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regcache_raw_collect (regcache, ARM_LR_REGNUM,
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(char *) &inferior_registers.r_lr);
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if (arm_apcs_32)
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{
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regcache_raw_collect (regcache, ARM_PC_REGNUM,
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(char *) &inferior_registers.r_pc);
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regcache_raw_collect (regcache, ARM_PS_REGNUM,
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(char *) &inferior_registers.r_cpsr);
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}
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else
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{
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unsigned pc_val;
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unsigned psr_val;
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regcache_raw_collect (regcache, ARM_PC_REGNUM,
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(char *) &pc_val);
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regcache_raw_collect (regcache, ARM_PS_REGNUM,
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(char *) &psr_val);
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pc_val = gdbarch_addr_bits_remove (gdbarch, pc_val);
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psr_val ^= gdbarch_addr_bits_remove (gdbarch, psr_val);
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inferior_registers.r_pc = pc_val | psr_val;
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}
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ret = ptrace (PT_SETREGS, ptid_get_pid (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_registers, 0);
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if (ret < 0)
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warning (_("unable to store general registers"));
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}
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static void
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store_fp_register (const struct regcache *regcache, int regno)
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{
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struct fpreg inferior_fp_registers;
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|
int ret;
|
|
|
|
ret = ptrace (PT_GETFPREGS, ptid_get_pid (inferior_ptid),
|
|
(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
|
|
|
|
if (ret < 0)
|
|
{
|
|
warning (_("unable to fetch floating-point registers"));
|
|
return;
|
|
}
|
|
|
|
switch (regno)
|
|
{
|
|
case ARM_FPS_REGNUM:
|
|
regcache_raw_collect (regcache, ARM_FPS_REGNUM,
|
|
(char *) &inferior_fp_registers.fpr_fpsr);
|
|
break;
|
|
|
|
default:
|
|
regcache_raw_collect (regcache, regno,
|
|
(char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
|
|
break;
|
|
}
|
|
|
|
ret = ptrace (PT_SETFPREGS, ptid_get_pid (inferior_ptid),
|
|
(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
|
|
|
|
if (ret < 0)
|
|
warning (_("unable to write register %d to inferior"), regno);
|
|
}
|
|
|
|
static void
|
|
store_fp_regs (const struct regcache *regcache)
|
|
{
|
|
struct fpreg inferior_fp_registers;
|
|
int ret;
|
|
int regno;
|
|
|
|
|
|
for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
|
|
regcache_raw_collect (regcache, regno,
|
|
(char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
|
|
|
|
regcache_raw_collect (regcache, ARM_FPS_REGNUM,
|
|
(char *) &inferior_fp_registers.fpr_fpsr);
|
|
|
|
ret = ptrace (PT_SETFPREGS, ptid_get_pid (inferior_ptid),
|
|
(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
|
|
|
|
if (ret < 0)
|
|
warning (_("unable to store floating-point registers"));
|
|
}
|
|
|
|
static void
|
|
armnbsd_store_registers (struct target_ops *ops,
|
|
struct regcache *regcache, int regno)
|
|
{
|
|
if (regno >= 0)
|
|
{
|
|
if (regno < ARM_F0_REGNUM || regno > ARM_FPS_REGNUM)
|
|
store_register (regcache, regno);
|
|
else
|
|
store_fp_register (regcache, regno);
|
|
}
|
|
else
|
|
{
|
|
store_regs (regcache);
|
|
store_fp_regs (regcache);
|
|
}
|
|
}
|
|
|
|
struct md_core
|
|
{
|
|
struct reg intreg;
|
|
struct fpreg freg;
|
|
};
|
|
|
|
static void
|
|
fetch_core_registers (struct regcache *regcache,
|
|
char *core_reg_sect, unsigned core_reg_size,
|
|
int which, CORE_ADDR ignore)
|
|
{
|
|
struct md_core *core_reg = (struct md_core *) core_reg_sect;
|
|
int regno;
|
|
CORE_ADDR r_pc;
|
|
|
|
arm_supply_gregset (regcache, &core_reg->intreg);
|
|
arm_supply_fparegset (regcache, &core_reg->freg);
|
|
}
|
|
|
|
static void
|
|
fetch_elfcore_registers (struct regcache *regcache,
|
|
char *core_reg_sect, unsigned core_reg_size,
|
|
int which, CORE_ADDR ignore)
|
|
{
|
|
struct reg gregset;
|
|
struct fpreg fparegset;
|
|
|
|
switch (which)
|
|
{
|
|
case 0: /* Integer registers. */
|
|
if (core_reg_size != sizeof (struct reg))
|
|
warning (_("wrong size of register set in core file"));
|
|
else
|
|
{
|
|
/* The memcpy may be unnecessary, but we can't really be sure
|
|
of the alignment of the data in the core file. */
|
|
memcpy (&gregset, core_reg_sect, sizeof (gregset));
|
|
arm_supply_gregset (regcache, &gregset);
|
|
}
|
|
break;
|
|
|
|
case 2:
|
|
if (core_reg_size != sizeof (struct fpreg))
|
|
warning (_("wrong size of FPA register set in core file"));
|
|
else
|
|
{
|
|
/* The memcpy may be unnecessary, but we can't really be sure
|
|
of the alignment of the data in the core file. */
|
|
memcpy (&fparegset, core_reg_sect, sizeof (fparegset));
|
|
arm_supply_fparegset (regcache, &fparegset);
|
|
}
|
|
break;
|
|
|
|
default:
|
|
/* Don't know what kind of register request this is; just ignore it. */
|
|
break;
|
|
}
|
|
}
|
|
|
|
static struct core_fns arm_netbsd_core_fns =
|
|
{
|
|
bfd_target_unknown_flavour, /* core_flovour. */
|
|
default_check_format, /* check_format. */
|
|
default_core_sniffer, /* core_sniffer. */
|
|
fetch_core_registers, /* core_read_registers. */
|
|
NULL
|
|
};
|
|
|
|
static struct core_fns arm_netbsd_elfcore_fns =
|
|
{
|
|
bfd_target_elf_flavour, /* core_flovour. */
|
|
default_check_format, /* check_format. */
|
|
default_core_sniffer, /* core_sniffer. */
|
|
fetch_elfcore_registers, /* core_read_registers. */
|
|
NULL
|
|
};
|
|
|
|
void
|
|
_initialize_arm_netbsd_nat (void)
|
|
{
|
|
struct target_ops *t;
|
|
|
|
t = inf_ptrace_target ();
|
|
t->to_fetch_registers = armnbsd_fetch_registers;
|
|
t->to_store_registers = armnbsd_store_registers;
|
|
add_target (t);
|
|
|
|
deprecated_add_core_fns (&arm_netbsd_core_fns);
|
|
deprecated_add_core_fns (&arm_netbsd_elfcore_fns);
|
|
}
|