binutils-gdb/sim/example-synacor
Mike Frysinger be0387eed0 sim: hw: rework configure option & device selection
The sim-hardware configure option allows builders to select a set of
device models to enable.  But this seems like unnecessary overkill:
the existence of individual device models doesn't affect performance
at all as they are only enabled at runtime if the config uses them,
and individually these are all <5KB a piece.  Stripping off a total
of ~50KB from a ~1MB binary doesn't seem useful, and it's extremely
unlikely anyone will ever bother.

So let's simplify the configure/make logic by turning sim-hardware
into a boolean option like many of the other sim options.  Any ports
that have unique device models will declare them in their Makefile
instead of at configure time.  This will allow us to (eventually)
unify the setting into the common dir.
2021-06-21 21:36:51 -04:00
..
aclocal.m4 sim: delete SIM_AC_COMMON macro 2021-06-20 00:39:38 -04:00
ChangeLog sim: hw: rework configure option & device selection 2021-06-21 21:36:51 -04:00
configure sim: hw: rework configure option & device selection 2021-06-21 21:36:51 -04:00
configure.ac sim: delete SIM_AC_COMMON macro 2021-06-20 00:39:38 -04:00
interp.c sim: overhaul & unify endian settings management 2021-06-17 23:20:13 -04:00
Makefile.in
README
README.arch-spec
sim-main.c sim: split sim-signal.h include out 2021-06-18 00:50:14 -04:00
sim-main.h sim: fully merge sim_state_base into sim_state 2021-05-17 01:05:08 -04:00

= OVERVIEW =

The Synacor Challenge is a fun programming exercise with a number of puzzles
built into it.  You can find more details about it here:
https://challenge.synacor.com/

The first puzzle is writing an interpreter for their custom ISA.  This is a
simulator for that custom CPU.  The CPU is quite basic: it's 16-bit with only
8 registers and a limited set of instructions.  This means the port will never
grow new features.  See README.arch-spec for more details.

Implementing it here ends up being quite useful: it acts as a simple constrained
"real world" example for people who want to implement a new simulator for their
own architecture.  We demonstrate all the basic fundamentals (registers, memory,
branches, and tracing) that all ports should have.