e4e20d4511
Right now, gdbsupport/common-regcache.h contains two abstractons for a regcache. An opaque type `regcache` (gdb and gdbserver both have their own regcache that is the concrete version of this) and an abstract base class `reg_buffer_common`, that is the base of regcaches on both sides. These abstractions allow code to be written for both gdb and gdbserver, for instance in the gdb/arch sub-directory. However, having two different abstractions is impractical. If some common code has a regcache, and wants to use an operation defined on reg_buffer_common, it can't. It would be better to have just one. Change all instances of `regcache *` in gdbsupport/common-regcache.h to be `reg_buffer_common *`, then fix fallouts. Implementations in gdb and gdbserver now need to down-cast (using gdb::checked_static_cast) from reg_buffer_common to their concrete regcache type. Some of them could be avoided by changing free functions (like regcache_register_size) to be virtual methods on reg_buffer_common. I tried it, it seems to work, but I did not include it in this series to avoid adding unnecessary changes. Change-Id: Ia5503adb6b5509a0f4604bd2a68b4642cc5283fd Reviewed-by: John Baldwin <jhb@FreeBSD.org>
68 lines
2.2 KiB
C++
68 lines
2.2 KiB
C++
/* Common code for ARM software single stepping support.
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Copyright (C) 1988-2023 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#ifndef ARCH_ARM_GET_NEXT_PCS_H
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#define ARCH_ARM_GET_NEXT_PCS_H
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#include <vector>
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/* Forward declaration. */
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struct arm_get_next_pcs;
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struct reg_buffer_common;
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/* get_next_pcs operations. */
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struct arm_get_next_pcs_ops
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{
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ULONGEST (*read_mem_uint) (CORE_ADDR memaddr, int len, int byte_order);
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CORE_ADDR (*syscall_next_pc) (struct arm_get_next_pcs *self);
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CORE_ADDR (*addr_bits_remove) (struct arm_get_next_pcs *self, CORE_ADDR val);
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int (*is_thumb) (struct arm_get_next_pcs *self);
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/* Fix up PC if needed. */
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CORE_ADDR (*fixup) (struct arm_get_next_pcs *self, CORE_ADDR pc);
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};
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/* Context for a get_next_pcs call on ARM. */
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struct arm_get_next_pcs
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{
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/* Operations implementations. */
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struct arm_get_next_pcs_ops *ops;
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/* Byte order for data. */
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int byte_order;
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/* Byte order for code. */
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int byte_order_for_code;
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/* Whether the target has 32-bit thumb-2 breakpoint defined or
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not. */
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int has_thumb2_breakpoint;
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/* Registry cache. */
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reg_buffer_common *regcache;
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};
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/* Initialize arm_get_next_pcs. */
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void arm_get_next_pcs_ctor (struct arm_get_next_pcs *self,
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struct arm_get_next_pcs_ops *ops,
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int byte_order,
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int byte_order_for_code,
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int has_thumb2_breakpoint,
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reg_buffer_common *regcache);
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/* Find the next possible PCs after the current instruction executes. */
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std::vector<CORE_ADDR> arm_get_next_pcs (struct arm_get_next_pcs *self);
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#endif /* ARCH_ARM_GET_NEXT_PCS_H */
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