6655dba246
PR 25224 bfd * Makefile.am: Add z80-elf target support. * configure.ac: Likewise. * targets.c: Likewise. * config.bfd: Add z80-elf target support and new arches: ez80 and z180. * elf32-z80.c: New file. * archures.c: Add new z80 architectures: eZ80 and Z180. * coffcode.h: Likewise. * cpu-z80.c: Likewise. * bfd-in2.h: Likewise plus additional Z80 relocations. * coff-z80.c: Add new relocations for Z80 target and local label check. gas * config/tc-z80.c: Add new architectures: Z180 and eZ80. Add support for assembler code generated by SDCC. Add new relocation types. Add z80-elf target support. * config/tc-z80.h: Add z80-elf target support. Enable dollar local labels. Local labels starts from ".L". * testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict. * testsuite/gas/all/fwdexp.s: Likewise. * testsuite/gas/z80/suffix.d: Fix failure on ELF target. * testsuite/gas/z80/z80.exp: Add new tests * testsuite/gas/z80/dollar.d: New file. * testsuite/gas/z80/dollar.s: New file. * testsuite/gas/z80/ez80_adl_all.d: New file. * testsuite/gas/z80/ez80_adl_all.s: New file. * testsuite/gas/z80/ez80_adl_suf.d: New file. * testsuite/gas/z80/ez80_isuf.s: New file. * testsuite/gas/z80/ez80_z80_all.d: New file. * testsuite/gas/z80/ez80_z80_all.s: New file. * testsuite/gas/z80/ez80_z80_suf.d: New file. * testsuite/gas/z80/r800_extra.d: New file. * testsuite/gas/z80/r800_extra.s: New file. * testsuite/gas/z80/r800_ii8.d: New file. * testsuite/gas/z80/r800_z80_doc.d: New file. * testsuite/gas/z80/z180.d: New file. * testsuite/gas/z80/z180.s: New file. * testsuite/gas/z80/z180_z80_doc.d: New file. * testsuite/gas/z80/z80_doc.d: New file. * testsuite/gas/z80/z80_doc.s: New file. * testsuite/gas/z80/z80_ii8.d: New file. * testsuite/gas/z80/z80_ii8.s: New file. * testsuite/gas/z80/z80_in_f_c.d: New file. * testsuite/gas/z80/z80_in_f_c.s: New file. * testsuite/gas/z80/z80_op_ii_ld.d: New file. * testsuite/gas/z80/z80_op_ii_ld.s: New file. * testsuite/gas/z80/z80_out_c_0.d: New file. * testsuite/gas/z80/z80_out_c_0.s: New file. * testsuite/gas/z80/z80_reloc.d: New file. * testsuite/gas/z80/z80_reloc.s: New file. * testsuite/gas/z80/z80_sli.d: New file. * testsuite/gas/z80/z80_sli.s: New file. ld * Makefile.am: Add new target z80-elf * configure.tgt: Likewise. * emultempl/z80.em: Add support for eZ80 and Z180 architectures. * emulparams/elf32z80.sh: New file. * emultempl/z80elf.em: Likewise. * testsuite/ld-z80/arch_ez80_adl.d: Likewise. * testsuite/ld-z80/arch_ez80_z80.d: Likewise. * testsuite/ld-z80/arch_r800.d: Likewise. * testsuite/ld-z80/arch_z180.d: Likewise. * testsuite/ld-z80/arch_z80.d: Likewise. * testsuite/ld-z80/comb_arch_ez80_z80.d: Likewise. * testsuite/ld-z80/comb_arch_z180.d: Likewise. * testsuite/ld-z80/labels.s: Likewise. * testsuite/ld-z80/relocs.s: Likewise. * testsuite/ld-z80/relocs_b_ez80.d: Likewise. * testsuite/ld-z80/relocs_b_z80.d: Likewise. * testsuite/ld-z80/relocs_f_z80.d: Likewise. * testsuite/ld-z80/z80.exp: Likewise. opcodes * z80-dis.c: Add support for eZ80 and Z80 instructions.
323 lines
10 KiB
Text
323 lines
10 KiB
Text
@c Copyright (C) 2011-2020 Free Software Foundation, Inc.
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@c This is part of the GAS manual.
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@c For copying conditions, see the file as.texinfo.
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@ifset GENERIC
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@page
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@node Z80-Dependent
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@chapter Z80 Dependent Features
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@end ifset
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@ifclear GENERIC
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@node Machine Dependencies
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@chapter Z80 Dependent Features
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@end ifclear
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@cindex Z80 support
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@menu
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* Z80 Options:: Options
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* Z80 Syntax:: Syntax
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* Z80 Floating Point:: Floating Point
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* Z80 Directives:: Z80 Machine Directives
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* Z80 Opcodes:: Opcodes
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@end menu
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@node Z80 Options
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@section Options
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@cindex Z80 options
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@cindex options for Z80
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@table @option
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@cindex @code{-z80} command-line option, Z80
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@item -z80
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Produce code for the Z80 processor. By default accepted undocumented
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operations with halves of index registers (IXL, IXH, IYL, IYH) and
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instuction IN F,(C). Other useful undocumented instructions produces
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warnings. Undocumented instructions may not work on some CPUs, use
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them on your own risk.
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@cindex @code{-r800} command-line option, R800
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@item -r800
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Produce code for the R800 processor.
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@cindex @code{-z180} command-line option, Z180
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@item -z180
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Produce code for the Z180 processor.
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@cindex @code{-ez80} command-line option, eZ80
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@item -ez80
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Produce code for the eZ80 processor in Z80 memory mode by default.
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@cindex @code{-ez80-adl} command-line option, eZ80
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@item -ez80-adl
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Produce code for the eZ80 processor in ADL memory mode by default.
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@cindex Compatibility options
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@item @code{-colonless}
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Accept colonless labels. All names at line begin are treated as labels.
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@item @code{-sdcc}
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Accept assembler code produces by SDCC.
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@cindex Undocumented instruction control
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@item @code{-strict}
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Accept documented instructions only.
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@item @code{-full}
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Accept all known Z80 instructions.
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@item @code{-with-inst=INST[,...]}
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@itemx @code{-Wnins INST[,...]}
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Enable specified undocumented instruction(s).
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@item @code{-without-inst=INST[,...]}
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@itemx @code{-Fins INST[,...]}
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Disable specified undocumented instruction(s).
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@cindex Obsolete options
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@item @code{-ignore-undocumented-instructions}
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@itemx @code{-Wnud}
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Silently assemble undocumented Z80-instructions that have been adopted
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as documented R800-instructions .
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@item @code{-ignore-unportable-instructions}
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@itemx @code{-Wnup}
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Silently assemble all undocumented Z80-instructions.
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@item @code{-warn-undocumented-instructions}
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@itemx @code{-Wud}
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Issue warnings for undocumented Z80-instructions that work on R800, do
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not assemble other undocumented instructions without warning.
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@item @code{-warn-unportable-instructions}
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@itemx @code{-Wup}
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Issue warnings for other undocumented Z80-instructions, do not treat any
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undocumented instructions as errors.
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@item @code{-forbid-undocumented-instructions}
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@itemx @code{-Fud}
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Treat all undocumented z80-instructions as errors.
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@item -forbid-unportable-instructions
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@itemx @code{-Fup}
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Treat undocumented z80-instructions that do not work on R800 as errors.
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@end table
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Known undocumented instructions.
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@table @option
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@cindex Known undocumented instructions
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@item @code{idx-reg-halves}
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All operations with halves of index registers (IXL, IXH, IYL, IYH).
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@item @code{sli}
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SLI or SLL instruction. Same as @code{SLA r; INC r}.
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@item @code{op-ii-ld}
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Istructions like @code{<op> (<ii>+<d>),<r>}. For example: @code{RL (IX+5),C}
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@item @code{in-f-c}
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Instruction @code{IN F,(C)}.
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@item @code{out-c-0}
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Instruction @code{OUT (C),0}
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@end table
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@cindex Z80 Syntax
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@node Z80 Syntax
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@section Syntax
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The assembler syntax closely follows the 'Z80 family CPU User Manual' by
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Zilog.
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In expressions a single @samp{=} may be used as ``is equal to''
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comparison operator.
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Suffices can be used to indicate the radix of integer constants;
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@samp{H} or @samp{h} for hexadecimal, @samp{D} or @samp{d} for decimal,
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@samp{Q}, @samp{O}, @samp{q} or @samp{o} for octal, and @samp{B} for
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binary.
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The suffix @samp{b} denotes a backreference to local label.
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@menu
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* Z80-Chars:: Special Characters
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* Z80-Regs:: Register Names
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* Z80-Case:: Case Sensitivity
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@end menu
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@node Z80-Chars
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@subsection Special Characters
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@cindex line comment character, Z80
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@cindex Z80 line comment character
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The semicolon @samp{;} is the line comment character;
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If a @samp{#} appears as the first character of a line then the whole
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line is treated as a comment, but in this case the line could also be
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a logical line number directive (@pxref{Comments}) or a preprocessor
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control command (@pxref{Preprocessing}).
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@cindex line separator, Z80
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@cindex statement separator, Z80
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@cindex Z80 line separator
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The Z80 assembler does not support a line separator character.
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@cindex location counter, Z80
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@cindex hexadecimal prefix, Z80
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@cindex Z80 $
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The dollar sign @samp{$} can be used as a prefix for hexadecimal numbers
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and as a symbol denoting the current location counter.
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@cindex character escapes, Z80
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@cindex Z80, \
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A backslash @samp{\} is an ordinary character for the Z80 assembler.
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@cindex character constant, Z80
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@cindex single quote, Z80
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@cindex Z80 '
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The single quote @samp{'} must be followed by a closing quote. If there
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is one character in between, it is a character constant, otherwise it is
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a string constant.
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@node Z80-Regs
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@subsection Register Names
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@cindex Z80 registers
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@cindex register names, Z80
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The registers are referred to with the letters assigned to them by
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Zilog. In addition @command{@value{AS}} recognizes @samp{ixl} and
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@samp{ixh} as the least and most significant octet in @samp{ix}, and
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similarly @samp{iyl} and @samp{iyh} as parts of @samp{iy}.
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@c The @samp{'} in @samp{ex af,af'} may be omitted.
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@node Z80-Case
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@subsection Case Sensitivity
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@cindex Z80, case sensitivity
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@cindex case sensitivity, Z80
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Upper and lower case are equivalent in register names, opcodes,
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condition codes and assembler directives.
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The case of letters is significant in labels and symbol names. The case
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is also important to distinguish the suffix @samp{b} for a backward reference
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to a local label from the suffix @samp{B} for a number in binary notation.
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@node Z80 Floating Point
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@section Floating Point
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@cindex floating point, Z80
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@cindex Z80 floating point
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Floating-point numbers are not supported.
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@node Z80 Directives
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@section Z80 Assembler Directives
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@command{@value{AS}} for the Z80 supports some additional directives for
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compatibility with other assemblers.
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@cindex Z80-only directives
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These are the additional directives in @code{@value{AS}} for the Z80:
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@table @code
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@item assume @var{ADL}@samp{=}@var{expression}
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Set ADL status for eZ80. Non-null value enable compilation ADL mode else
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used Z80 mode. ADL and Z80 mode produces incompatible object code. Mixing
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both of them within one binary may lead problems with disassembler.
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@item db @var{expression}|@var{string}[,@var{expression}|@var{string}...]
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@itemx defb @var{expression}|@var{string}[,@var{expression}|@var{string}...]
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For each @var{string} the characters are copied to the object file, for
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each other @var{expression} the value is stored in one byte.
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A warning is issued in case of an overflow.
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@item dw @var{expression}[,@var{expression}...]
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@itemx defw @var{expression}[,@var{expression}...]
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For each @var{expression} the value is stored in two bytes, ignoring
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overflow.
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@item d24 @var{expression}[,@var{expression}...]
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@itemx def24 @var{expression}[,@var{expression}...]
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For each @var{expression} the value is stored in three bytes, ignoring
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overflow.
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@item d32 @var{expression}[,@var{expression}...]
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@itemx def32 @var{expression}[,@var{expression}...]
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For each @var{expression} the value is stored in four bytes, ignoring
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overflow.
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@item ds @var{count}[, @var{value}]
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@itemx defs @var{count}[, @var{value}]
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@c Synonyms for @code{ds.b},
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@c which should have been described elsewhere
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Fill @var{count} bytes in the object file with @var{value}, if
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@var{value} is omitted it defaults to zero.
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@item @var{symbol} equ @var{expression}
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@itemx @var{symbol} defl @var{expression}
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These directives set the value of @var{symbol} to @var{expression}. If
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@code{equ} is used, it is an error if @var{symbol} is already defined.
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Symbols defined with @code{equ} are not protected from redefinition.
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@item psect @var{name}
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A synonym for @xref{Section}, no second argument should be given.
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@ignore
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The following attributes will possibly be recognized in the future
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@table @code
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@item abs
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The section is to be absolute. @code{@value{AS}} will issue an error
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message because it can not produce an absolute section.
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@item global
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The section is to be concatenated with other sections of the same name
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by the linker, this is the default.
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@item local
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The section is not global. @code{@value{AS}} will issue a warning if
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object file format is not soff.
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@item ovrld
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The section is to be overlapped with other sections of the same name by
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the linker. @code{@value{AS}} will issue an error message
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because it can not mark a section as such.
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@item pure
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The section is marked as read only.
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@end table
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@end ignore
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@end table
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@node Z80 Opcodes
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@section Opcodes
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In line with common practice, Z80 mnemonics are used for the Z80,
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the Z180, eZ80 and the R800.
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In many instructions it is possible to use one of the half index
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registers (@samp{ixl},@samp{ixh},@samp{iyl},@samp{iyh}) in stead of an
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8-bit general purpose register. This yields instructions that are
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documented on the eZ80 and the R800, undocumented on the Z80 and
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unsupported on the Z180.
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Similarly @code{in f,(c)} is documented on the R800, undocumented on
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the Z80 and unsupported on the Z180 and the eZ80.
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The assembler also supports the following undocumented Z80-instructions,
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that have not been adopted in any other instruction set:
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@table @code
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@item out (c),0
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Sends zero to the port pointed to by register c.
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@item sli @var{m}
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Equivalent to @code{@var{m} = (@var{m}<<1)+1}, the operand @var{m} can
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be any operand that is valid for @samp{sla}. One can use @samp{sll} as a
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synonym for @samp{sli}.
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@item @var{op} (ix+@var{d}), @var{r}
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This is equivalent to
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@example
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ld @var{r}, (ix+@var{d})
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@var{opc} @var{r}
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ld (ix+@var{d}), @var{r}
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@end example
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The operation @samp{@var{opc}} may be any of @samp{res @var{b},},
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@samp{set @var{b},}, @samp{rl}, @samp{rlc}, @samp{rr}, @samp{rrc},
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@samp{sla}, @samp{sli}, @samp{sra} and @samp{srl}, and the register
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@samp{@var{r}} may be any of @samp{a}, @samp{b}, @samp{c}, @samp{d},
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@samp{e}, @samp{h} and @samp{l}.
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@item @var{opc} (iy+@var{d}), @var{r}
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As above, but with @samp{iy} instead of @samp{ix}.
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@end table
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The web site at @uref{http://www.z80.info} is a good starting place to
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find more information on programming the Z80.
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You may enable or disable any of these instructions for any target CPU
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even this instruction is not supported by any real CPU of this type.
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Useful for custom CPU cores.
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